Datasheet

SCI Control Registers www.ti.com
29.7.7 SCI Flags Register (SCIFLR)
Figure 29-14 and Table 29-10 illustrate this register.
Figure 29-14. SCI Flags Register (SCIFLR) [offset = 1Ch]
31 27 26 25 24
Reserved FE OE PE
R-0 R/W-0 R/W-0 R/W-0
23 16
Reserved
R-0
15 13 12 11 10 9 8
Reserved RX WAKE TX EMPTY TX WAKE RX RDY TX RDY
R-0 R/W-0 R/W-1 R/W-0 R/W-0 R/W-1
7 4 3 2 1 0
Reserved BUSY IDLE WAKE UP BRKDT
R-0 R/W-0 R-0 R/WL-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 29-10. SCI Flags Register (SCIFLR) Field Descriptions
Bit Field Value Description
31-27 Reserved Read returns 0. Writes have no effect.
26 FE Framing error flag. This bit is effective in LIN or SCI-compatible mode. This bit is set when an
expected stop bit is not found. In SCI compatibility mode, only the first stop bit is checked. The
missing stop bit indicates that synchronization with the start bit has been lost and that the character
is incorrectly framed. Detection of a framing error causes the SCI/LIN to generate an error interrupt
if the SET FE INT bit is set in the register SCISETINT (SCI Set Interrupt Register (SCISETINT)).
The framing error flag is cleared by the following:
• Setting of the SW nRST bit
• Setting of the RESET bit
• A system reset
• Writing a 1 to this bit
• Reading the corresponding interrupt offset in SCIINTVECT0/1
• Reception of a new character/frame, depending on whether the module is in SCI compatible or
LIN mode
In multi-buffer mode the frame is defined in the SCIFORMAT register.
0 Read: No framing error has been detected since the last clear.
Write: No effect.
1 Read: A framing error has been detected since the last clear.
Write: The bit is cleared to 0.
25 OE Overrun error flag. This bit is set when the transfer of data from SCIRXSHF to SCIRD overwrites
unread data already in SCIRD. Detection of an overrun error causes the LIN to generate an error
interrupt if the SET OE INT bit = 1. The OE flag is reset by the following:
• Setting of the SW nRST bit
• Setting of the RESET bit
• A system reset
• Writing a 1 to this bit
• Reading the corresponding interrupt offset in SCIINTVECT0/1
0 Read: No overrun error has been detected since the last clear.
Write: No effect.
1 Read: An overrun error has been detected since the last clear.
Write: The bit is cleared to 0.
1466
Serial Communication Interface (SCI) Module SPNU562–May 2014
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