Datasheet
Isosynchronous baud value =
For BAUD = 0,
Isosynchronous baud value =
VBUSPCLK Frequency
BAUD 1+
-----------------------------------------------------------------
VCLK Frequency
32
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SCI Communication Formats
In isosynchronous timing mode, the SCI generates a baud clock according to the following formula:
(56)
29.2.4 SCI Multiprocessor Communication Modes
In some applications, the SCI may be connected to more than one serial communication device. In such a
multiprocessor configuration, several frames of data may be sent to all connected devices or to an
individual device. In the case of data sent to an individual device, the receiving devices must determine
when they are being addressed. When a message is not intended for them, the devices can ignore the
following data. When only two devices make up the SCI network, addressing is not needed, so
multiprocessor communication schemes are not required.
SCI supports two multiprocessor Communication Modes which can be selected using COMM MODE bit:
• Idle-Line Mode
• Address Bit Mode
When the SCI is not used in a multiprocessor environment, software can consider all frames as data
frames. In this case, the only distinction between the idle-line and address-bit modes is the presence of an
extra bit (the address bit) in each frame sent with the address-bit protocol.
The SCI allows full-duplex communication where data can be sent and received via the transmit and
receive pins simultaneously. However, the protocol used by the SCI assumes that only one device
transmits data on the same bus line at any one time. No arbitration is done by the SCI.
NOTE: Avoid Transmitting Simultaneously on the Same Serial Bus
The system designer must ensure that devices connected to the same serial bus line do not
attempt to transmit simultaneously. If two devices are transmitting different data, the resulting
bus conflict could damage the device..
29.2.4.1 Idle-Line Multiprocessor Modes
In idle-line multiprocessor mode, a frame that is preceded by an idle period (10 or more idle bits) is an
address frame. A frame that is preceded by fewer than 10 idle bits is a data frame. Figure 29-4 illustrates
the format of several blocks and frames with idle-line mode.
There are two ways to transmit an address frame using idle-line mode:
Method 1: In software, deliberately leave an idle period between the transmission of the last data frame of
the previous block and the address frame of the new block.
Method 2: Configure the SCI to automatically send an idle period between the last data frame of the
previous block and the address frame of the new block.
Although Method 1 is only accomplished by a delay loop in software, Method 2 can be implemented by
using the transmit buffer and the TXWAKE bit in the following manner:
Step1 : Write a 1 to the TXWAKE bit.
Step2 : Write a dummy data value to the SCITD register. This triggers the SCI to begin the idle period as
soon as the transmitter shift register is empty.
Step3 : Wait for the SCI to clear the TXWAKE flag.
Step4 : Write the address value to SCITD.
1443
SPNU562–May 2014 Serial Communication Interface (SCI) Module
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