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28.2.4.1.2 Receiving Data in Multi-Buffer Mode
Multi-Buffer Mode is selected when MBUF MODE bit is 1. In this mode SCI sets the RXRDY bit when
programmed number of data are received in the receive buffer, the complete frame. The error condition
detection logic is same as Single Buffer Mode, except that it monitors for the complete frame. Like Single
Buffer Mode, you can use either Interrupt, DMA or polling method to read the data. The received data has
to be read from the LINRD0 and LINRD1 register, based on the number of bytes. For LENGTH less than
or equal to 4, Read to LINRD0 register will clear the “RXRDY” flag. For LENGTH greater than 4, Read to
LINRD1 register will clear the “RXRDY” flag.
28.2.4.2 Transmitting Data
The SCI transmitter is enabled if the TX FUNC bit and the TXENA bit are set to 1. If the TX FUNC bit is
not set, the LINTX pin functions as a general purpose I/O pin rather than as an SCI function pin. Any
value written to the SCITD before TXENA is set to 1 is not transmitted. Both of these control bits allow for
the SCI transmitter to be held inactive independently of the receiver.
SCI module can transmit data in one of the following modes:
• Single-Buffer (Normal) Mode
• Multi-Buffered or Buffered SCI Mode.
28.2.4.2.1 Transmitting Data in Single-Buffer Mode
Single Buffer Mode is selected when MBUF MODE bit is 0. In this mode SCI waits for data to be written to
SCITD, transfers it to SCITXSHF, and transmits it. The flags TXRDY and TX EMPTY indicate the status of
the transmit buffers. That is, when the transmitter is ready for data to be written to SCITD, the TXRDY bit
is set. Additionally, if both SCITD and SCITXSHF are empty, then the TX EMPTY bit is also set.
You can transmit data by:
1. Polling Transmit Ready Flag
2. Receive Interrupt
3. DMA
In polling method, software can poll for TXRDY bit to go high before writing the data to SCITD register.
CPU is unnecessarily overloaded by doing this Polling method. To avoid this, you can use either Interrupt
or DMA method. To use interrupt method SET TX INT bit should be set and to use DMA SET TX DMA bit
should be set. Either an Interrupt or a DMA request is generated the moment TXRDY is set. When the
SCI has completed transmission of all pending frames, the SCITXSHF register and SCITD are empty, the
TXRDY bit is set, and an interrupt/DMA request is generated, if enabled. Because all data has been
transmitted, the interrupt/DMA request should be halted. This can be done by either disabling the transmit
interrupt (CLR TX INT) / DMA request (CLR TX DMA bit) or by disabling the transmitter (clear TXENA bit).
NOTE: The TXRDY flag cannot be cleared by reading the corresponding interrupt offset in the
SCIINTVECT0 or SCIINTVECT1 register.
28.2.4.2.2 Transmitting Data in Multi-Buffer Mode
Multi-Buffer Mode is selected when MBUF MODE bit is 1. Similar to Single Buffer Mode the software can
use polling, Interrupt or DMA method to write the data to be transmitted. The data to be transmitted has to
be written to LINTD0 and LINTD1 register, based on the number of bytes. SCI waits for data to be written
to Byte 0(TD0) of LINTD0 register and transfers the programmed number of bytes to SCITXSHF to
transmit one by one automatically.
1361
SPNU562–May 2014 Serial Communication Interface (SCI)/Local Interconnect Network (LIN)
Module
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