Datasheet

Control Registers

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27.3.28 Transfer Group Interrupt Level Set Register (TGITLVST)

The register TGITLVST sets the level of interrupts for transfer completed interrupt and for transfer

suspended interrupt to level 1.

The register map shown in Figure 27-63 andTable 27-36 represents a super-set device with the maximum

number of TGs (16) assumed. The actual number of bits available varies per device.

Figure 27-63. Transfer Group Interrupt Level Set Register (TGITLVST) [offset = 7Ch]

31 16

SETINTLVLRDY

R/W-0

15 0

SETINTLVLSUS

R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 27-36. Transfer Group Interrupt Level Set Register (TGITLVST) Field Descriptions

Bit Field Value Description

31-16 SETINTLVLRDY Transfer-group completed interrupt level set.

0 Read: The TGx-completed interrupt is set to INT0.

Write: A write of 0 to this bit has no effect.

1 Read: The TGx-completed interrupt is set to INT1.

Write: Set the TGx-completed interrupt to INT1.

15-0 SETINTLVLSUS Transfer-group suspended interrupt level set.

0 Read: TGx-suspended interrupt is set to INT0.

Write: A write of 0 to this bit has no effect.

1 Read: The TGx-suspended interrupt is set to INT1.

Write: Set the TG-x suspended interrupt INT1.

1300

Multi-Buffered Serial Peripheral Interface Module (MibSPI) with Parallel Pin SPNU562–May 2014

Option (MibSPIP)

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