Datasheet

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Table 27-18. SPI Pin Control Register 4 (SPIPC4) Field Descriptions (continued)
Bit Field Value Description
23-16 SIMOSET SPISIMOx data out set. This bit is only active when the SPISIMOx pin is configured as a general-
purpose output pin.
Bit 10 or bit 16 can be used to set the SOMI0 pin. If a 32-bit write is performed, bit 10 will
have priority over bit 16.
0 Read: SPISIMIx is logic 0.
Write: No effect.
1 Read: SPISIMIx is logic 1.
Write: Logic 1 is placed on SPISIMIx pin if it is in general-purpose output mode.
15-12 Reserved 0 Read returns 0. Writes have no effect.
11 SOMISET0 SPISOMI0 data out set. This pin is only active when the SPISOMI0 pin is configured as a general-
purpose output pin.
0 Read: SPISOMI0 is logic 0.
Write: No effect.
1 Read: SPISOMI0 is logic 1.
Write: Logic 1 is placed on SPISOMI0 pin if it is in general-purpose output mode.
10 SIMOSET0 SPISIMO0 data out set. This pin is only active when the SPISIMO0 pin is configured as a general-
purpose output pin.
0 Read: SPISIMO0 is logic 0.
Write: No effect.
1 Read: SPISIMO0 is logic 1.
Write: Logic 1 is placed on SPISIMO0 pin if it is in general-purpose output mode.
9 CLKSET SPICLK data out set. This bit is only active when the SPICLK pin is configured as a general-purpose
output pin.
0 Read: SPICLK is logic 0.
Write: No effect.
1 Read: SPICLK is logic 1.
Write: Logic 1 is placed on SPICLK pin if it is in general-purpose output mode.
8 ENASET SPIENA data out set. This bit is only active when the SPIENA pin is configured as a general-
purpose output pin.
0 Read: The SPIENA pin is logic 0.
Write: No effect.
1 Read: The SPIENA pin is logic 1.
Write: Logic 1 is placed on SPIENA pin if it is in general-purpose O/P mode.
7-0 SCSSET SPISCSx data out set. This bit is only active when the SPISCSx pin is configured as a general-
purpose output pin. A value of 1 written to this bit sets the corresponding SCSDOUT bit to 1.
0 Read: The SPISCSx pin is logic 0.
Write: No effect.
1 Read: The SPISCSx pin is logic 1.
Write: Logic 1 placed on SPISCSx pin if it is in general-purpose output mode.
1276
Multi-Buffered Serial Peripheral Interface Module (MibSPI) with Parallel Pin SPNU562–May 2014
Option (MibSPIP)
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