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Control Registers

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27.3.9 SPI Pin Control Register 3 (SPIPC3)

NOTE: Register bits vary by device

device. On devices with 8 data-line support, all of bits 31 to 16 are implemented. On devices

with less than 8 data lines, only a subset of these bits are available. Unimplemented bits

return 0 upon read and are not writable.

Figure 27-40. SPI Pin Control Register 3 (SPIPC3) [offset = 20h]

31 24 23 16

SOMIDOUT SIMODOUT

R/W-U R/W-U

15 12 11 10 9 8

Reserved SOMIDOUT0 SIMODOUT0 CLKDOUT ENADOUT

R-0 R/W-U R/W-U R/W-U R/W-U

7 0

SCSDOUT

R/W-U

LEGEND: R/W = Read/Write; R = Read only; U = Undefined; -n = value after reset

Table 27-17. SPI Pin Control Register 3 (SPIPC3) Field Descriptions

Bit Field Value Description

31-24 SOMIDOUT SPISOMIx data out write. This bit is only active when the SPISOMIx pin is configured as a general-

purpose I/O pin and configured as an output pin. The value of this bit indicates the value sent to the

pin.

Bit 11 or bit 24 can be used to set the direction for pin SPISOMI0. If a 32-bit write is

performed, bit 11 will have priority over bit 24.

0 Current value on SPISOMIx pin is logic 0.

1 Current value on SPISOMIx pin is logic 1

23-16 SIMODOUT SPISIMOx data out write. This bit is only active when the SPISIMOx pin is configured as a general-

purpose I/O pin and configured as an output pin. The value of this bit indicates the value sent to the

pin.

Bit 10 or bit 16 can be used to set the direction for pin SPISOMI0. If a 32-bit write is

performed, bit 10 will have priority over bit 16.

0 Current value on SPISIMOx pin is logic 0.

1 Current value on SPISIMOx pin is logic 1.

15-12 Reserved 0 Read returns 0. Writes have no effect.

11 SOMIDOUT0 SPISOMI0 data out write. This bit is only active when the SPISOMI0 pin is configured as a general-

purpose I/O pin and configured as an output pin. The value of this bit indicates the value sent to the

pin.

0 Current value on SPISOMI0 pin is logic 0.

1 Current value on SPISOMI0 pin is logic 1.

10 SIMODOUT0 SPISIMO0 data out write. This bit is only active when the SPISIMO0 pin is configured as a general-

purpose I/O pin and configured as an output pin. The value of this bit indicates the value sent to the

pin.

0 The SPISIMO0 pin is logic 0.

1 The SPISIMO0 pin is logic 1.

9 CLKDOUT SPICLK data out write. This bit is only active when the SPICLK pin is configured as a general-

purpose I/O pin and configured as an output pin. The value of this bit indicates the value sent to the

pin.

0 The SPICLK pin is logic 0.

1 The SPICLK pin is logic 1.

1274

Multi-Buffered Serial Peripheral Interface Module (MibSPI) with Parallel Pin SPNU562–May 2014

Option (MibSPIP)

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