Datasheet

t
cyc(RTP)
t
r
t
f
t
h(RTP)
t
l(RTP)
149
RM57L843
www.ti.com SPNS215C –FEBRUARY 2014–REVISED JUNE 2016
Submit Documentation Feedback
Product Folder Links: RM57L843
System Information and Electrical SpecificationsCopyright © 2014–2016, Texas Instruments Incorporated
6.22.9 RAM Trace Port (RTP)
The RTP provides the ability to datalog the RAM contents of the RM57Dx devices or accesses to
peripherals without program intrusion. It can trace all data write or read accesses to internal RAM. In
addition, it provides the capability to directly transfer data to a FIFO to support a CPU-controlled
transmission of the data. The trace data is transmitted over a dedicated external interface.
6.22.9.1 RTP Features
The RTP offers the following features:
• Two modes of operation - Trace Mode and Direct Data Mode
– Trace Mode
• Nonintrusive data trace on write or read operation
• Visibility of RAM content at any time on external capture hardware
• Trace of peripheral accesses
• 2 configurable trace regions for each RAM module to limit amount of data to be traced
• FIFO to store data and address of data of multiple read/write operations
• Trace of CPU and/or DMA accesses with indication of the master in the transmitted data packet
– Direct Data Mode
• Directly write data with the CPU or trace read operations to a FIFO, without transmitting header
and address information
• Dedicated synchronous interface to transmit data to external devices
• Free-running clock generation or clock stop mode between transmissions
• Up to 100 Mbps terminal transfer rate for transmitting data
• Pins not used in functional mode can be used as GIOs
6.22.9.2 Timing Specifications
Figure 6-32. RTPCLK Timing
Table 6-58. RTPCLK Timing
PARAMETER MIN MIN UNIT
t
cyc(RTP)
Clock period 9.09 (= 110 MHz) ns
t
h(RTP)
High pulse width ((t
cyc(RTP)
)/2) - ((t
r
+t
f
)/2) ns
t
l(RTP)
Low pulse width ((t
cyc(RTP)
)/2) - ((t
r
+t
f
)/2) ns