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GIO Control Registers

25.5.10 GIO Emulation B Register (GIOEMU2)

The GIOEMU2 register is a read-only register. The contents of this register are identical to the contents of

GIOOFF2. The intention for the this register is that software can use it without clearing the flags.

Figure 25-16 and Table 25-13 describe this register.

NOTE: The corresponding flag in the GIOFLG register is not cleared when the GIOEMU2 register is

read.

Figure 25-16. GIO Emulation 2 Register (GIOEMU2) [offset = 30h]

31 16

Reserved

R-0

15 6 5 0

Reserved GIOEMU2

R-0 R-0

LEGEND: R = Read only; -n = value after reset

Table 25-13. GIO Emulation 2 Register (GIOEMU2) Field Descriptions

Bit Field Value Description

31-6 Reserved 0 Read returns 0. Writes have no effect.

5-0 GIOEMU2 GIO offset emulation 2. These bits index the currently pending low-priority interrupt. No register

or flag is cleared by reading this register.

0 No interrupt is pending.

1h Interrupt 0 (corresponding to GIOA0) is pending with a low priority.

: :

8h Interrupt 7 (corresponding to GIOA7) is pending with a low priority.

9h Interrupt 8 (corresponding to GIOB0) is pending with a low priority.

: :

10h Interrupt 16 (corresponding to GIOB7) is pending with a low priority.

: :

20h Interrupt 32 (corresponding to GIOD7) is pending with a low priority.

21h-3Fh Reserved

1137

SPNU562–May 2014 General-Purpose Input/Output (GIO) Module

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