Datasheet

Power-On Reset
Enable GIO through PCR (Check device datasheet for the peripheral select)
Both rising and falling edge / single edge trigger interrupt?
Set corresponding bits in to 1GIOINTDET Clear corresponding bits in to 0GIOINTDET
Rising/Falling edge?
Enable the FIQ/IRQ interrupt in CPU (Check CPU User Guide)
Bring GIO out of reset (See register )
GIOGCR0
Enable the FIQ/IRQ interrupt in VIM (Check VIM User Guide)
Configure as high /low level interrupt?
Write 1 to corresponding bits in
GIOLVLSET Write 1 to corresponding bits in GIOLVLCLR
Low level
High level
Write 1 to corresponding bits in to enable interrupt
GIOENASET
Write 0xFF to clean the GIO interrupt flag register GIOFLG
Enable Peripherals by setting PENA bit in Clock Control Register (0xFFFFFFD0)
Initialize vector interrupt table - Map GIO low level interrupt and / or high level
interrupt service routine to pre-defined device specific interrupt channel.
(Check device datasheet)
Both edge
Single edge
Rising
Falling
Set corresponding bits in
to 1
GIOPOL
Clear corresponding bits in
to 0
GIOPOL
Quick Start Guide www.ti.com
Figure 25-3. Interrupt Generation Function Quick Start Flow Chart
In GIO interrupt service routine, user shall read the GIO offset register GIOOFFA / GIOOFFB (depending
on high/low level interrupt) to clear the flag and find the pending interrupt GIO channel.
1120
General-Purpose Input/Output (GIO) Module SPNU562–May 2014
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