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24.3.3 Example: 64-Bit-Transfer of Control Field and Data Fields
Table 24-8 shows how the internal element counter, frame counter and the address registers change over
time assuming the same example as in Section 24.3.2, but now with a transfer size set to 64-bit. The HET
address now points to the control field of the instruction, so CF and DF are transferred as 64 bit data.
Table 24-8. 64-Bit-Transfer of Control Field and Data Fields
(1)
Frame Counter 3 2 1
Element Counter 3 2 1 3 2 1 3 2 1
HET (Source) Address 34h 44h 54h 34h 44h 54h 34h 44h 54h
Full (Destination) Address 70h 78h 80h 88h 90h 98h A0h A8h B0h
(1)
Shows the byte addresses.
The destination buffer is filled with the WCAP, ECNT, and PCNT control and data field values as shown
on the right in Table 24-9.
Table 24-9. Destination Buffer Values
Address Frame Count Instruction Value
70h 3 WCAP Control Field Value
74h 3 WCAP 3
78h 3 ECNT Control Field Value
7Ch 3 ECNT 1
80h 3 PCNT Control Field Value
84h 3 PCNT 2
88h 2 WCAP Control Field Value
8Ch 2 WCAP 6
90h 2 ECNT Control Field Value
94h 2 ECNT 2
98h 2 PCNT Control Field Value
9Ch 2 PCNT 3
A0h 1 WCAP Control Field Value
A4h 1 WCAP 10
A8h 1 ECNT Control Field Value
ACh 1 ECNT 3
B0h 1 PCNT Control Field Value
B4h 1 PCNT 4
The necessary setup of the HTU control packet (see Section 24.5) for this example is as follows:
IHADDR = 0x34 (points to WCAP control field)
IFADDR = 0x70 (points to buffer)
ITCOUNT [frame count = 3] [element count = 3]
IHADDRCT = [DIR: Read HET and write to full address]
[SIZE: 64 bit]
[ADDMH: Increment HET address by 16 bytes]
[ADDMF: post increment full address mode]
[Any transfer mode]
For different applications, which have the transfer direction set for reading the buffer and writing to HET
fields, the 64-bit transfer could be used to change the conditional addresses together with a new data
field.
1081
SPNU562–May 2014 High-End Timer Transfer Unit (HTU) Module
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