Datasheet
+
=
Immediate DF
Register A, B, R, S, or T
Remote DF
32 bits
LSBs (HR data field)
Immediate CF
Remote CF
HR
HR
(dashed for R, S, T)
HR
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Instruction Set
Figure 23-131. RADM64 Data Field (D31:D0)
31 7 6 0
Data HR Data
25 7
Cycles Normally One Cycle. Two cycles if writing to remote address that is also the
next address.
Register modified None
Description This instruction modifies the data field, the HR data field and the control field
at the remote address. The advantage over DADM64 is that It executes one
cycle faster. In case the R, S, or T register is selected, the addition is a 32-bit
addition. The table description shows the bit encoding for determining which
ALU register is selected.
RADM64 has two distinct syntaxes. In the first syntax, bit values may be set
by assigning a value to each of the control fields. This syntax is convenient for
modifying control fields that are arranged similar to the format of the RADM64
control field. A second syntax, in which the entire 29-bit control field is
specified by the cntl_val field, is convenient when the remote control field is
dissimilar from the RADM64 control field. Either syntax may be used, but you
must use one or the either but not a combination of syntaxes. See Figure 23-
132.
Figure 23-132. RADM64 Add and Move Operation
comp_mode Selects the comparison mode type to be used.
Table 23-67. Comparison Type Encoding Format
comp_mode C[6] C[5] MCMP order
ECMP 0 0
SCMP 0 1
MCMP1 1 0 REG_GE_DATA
MCMP2 1 1 DATA_GE_REG
Table 23-68. RADM64 Control Field Descriptions
request Maintains the control field for the remote instruction.
Control Maintains the control field for the remote instruction.
en_pin_action Maintains the control field for the remote instruction.
cond_addr Maintains the control field for the remote instruction.
pin Maintains the control field for the remote instruction.
register Maintains the control field for the remote instruction.
action Maintains the control field for the remote instruction.
1049
SPNU562–May 2014 High-End Timer (N2HET) Module
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