Datasheet

31 0
Compare
control
INTy
DMAREQy
Compare
Update
compare
From counter
block 0
From counter
block 1
RTIUDCPy
RTICOMPy
31 0
=
+
126
RM57L843
SPNS215C –FEBRUARY 2014–REVISED JUNE 2016 www.ti.com
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System Information and Electrical Specifications Copyright © 2014–2016, Texas Instruments Incorporated
Figure 6-21. Compare Block Diagram
6.18.3 Clock Source Options
The RTI module uses the RTI1CLK clock domain for generating the RTI time bases.
The application can select the clock source for the RTI1CLK by configuring the RCLKSRC register in the
system module at address 0xFFFFFF50. The default source for RTI1CLK is VCLK.
For more information on clock sources, see Table 6-11 and Table 6-16.
6.18.4 Network Time Synchronization Inputs
The RTI module supports four Network Time Unit (NTU) inputs that signal internal system events, and
which can be used to synchronize the time base used by the RTI module. On this device, these NTU
inputs are connected as shown in Table 6-43.
Table 6-43. Network Time Synchronization Inputs
NTU INPUT SOURCE
0 Reserved
1 Reserved
2 PLL2 Clock output
3 EXTCLKIN1 clock input