Datasheet

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N2HET Control Registers

23.4.17 Request Destination Select Register (HETREQDS)

N2HET1: offset = FFF7 B844h; N2HET2: offset = FFF7 B944h

Figure 23-51. Request Destination Select Register (HETREQDS) [offset = FFF7 B844h]

31 24 23 22 21 20 19 18 17 16

Reserved TDBS 7 TDBS 6 TDBS 5 TDBS 4 TDBS 3 TDBS 2 TDBS 1 TDBS 0

R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

15 8 7 6 5 4 3 2 1 0

Reserved TDS 7 TDS 6 TDS 5 TDS 4 TDS 3 TDS 2 TDS 1 TDS 0

R-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0 R/W-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 23-31. Request Destination Select Register (HETREQDS) Field Descriptions

Bit Field Value Description

31-24 Reserved 0 Read returns 0. Writes have no effect.

23-16 TDBS n HTU, DMA or Both Select Bits

0 N2HET request line n is assigned to the module specified by TDS bit n.

1 N2HET request line n is assigned to both DMA and HTU. TDS bit n is ignored in this case.

15-8 Reserved 0 Read returns 0. Writes have no effect.

7-0 TDS n HTU or DMA Select Bits

Note: It must be ensured in the N2HET program, that one request line is triggered by only one

N2HET instruction.

0 N2HET request line n is assigned to HTU (TDBS bit n is zero).

1 N2HET request line n is assigned to DMA (TDBS bit n is zero).

NOTE: Please refer to the device data sheet how each of the 8 N2HET request lines are connected

to these modules. See also Section 23.2.9.

981

SPNU562–May 2014 High-End Timer (N2HET) Module

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