Datasheet

HR 0
HR 1
X
X
Output
Buffer
Outp ut
Buffer
LBPDIR [0] value
determ ines which H R
block is input and which
is output
LBSEL[0] value
determ ines whether or
not loopback is enabled
for these two block s
Pin 0
Pin 1
Loopback values W IL L be seen
on the pins in Analog Loopback
Mode
HR 0
HR 1
X
X
Output
Buffer
Output
Buffer
Pin 0
Pin 1
Loopback values will NOT be
seen on the pins in Digital
Loopback Mode
LBPDIR [0] value
determines which HR
block is input and which
is output
LBSEL[0] value
determines whether or
not loopback is enabled
for these two blocks
N2HET Functional Description www.ti.com
Figure 23-16. HR0 to HR1 Digital Loopback Logic: LBTYPE[0] = 0
Analog Loopback
Analog loopback mode is enabled by setting LBPTYPE[x] to ‘1’ in the HETLBPSEL Register for the
corresponding structure pairs. In analog loopback mode, the structure pairs are connected outside of the
output buffers. Therefore, the loopback values WILL be seen on the corresponding pins. Figure 23-17
shows an example of analog loopback between structures HR0 and HR1. LBSEL[0] has been set to ‘1’ to
enable loopback between the two structures. LBTYPE[0] has been set to ‘1’ to select analog mode for the
loopback pair. The LPBDIR[0] value will determine the direction of the loopback by selecting which of the
HR blocks is output, and which is input. The bold lines show the analog loopback path.
Figure 23-17. HR0 to HR1 Analog Loop Back Logic: LBTYPE[0] = 1
Note:
• The loop back direction can be selected independent of the HETDIR register setting.
• The pin which is not driven by the N2HET output pin actions can still be used as normal GIO pin.
952
High-End Timer (N2HET) Module SPNU562–May 2014
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