Datasheet

HR control logic
HR flags
HR up/down counter (7 bits)
HR register
Timer data in
HR prescale driver
HR compare data
Resolution clock
Timer data in
HET[x]
Timer data out
>
Loop
Resolution
Clock
HETDIR
HETDIN
HETDSET
HETDOUT
HETDCLR
{
HR
Structure
One Per
Pin
N2HET Functional Description www.ti.com
23.2.5.3 High Resolution Structure
All 32 I/Os provide the HR structure based on the HR clock. The HR clock frequency is programmed
through the Prescale Factor Register (HETPFR). In addition to the standard I/O structure, all pins have HR
hardware so that these pins can be used as HR input captures (using the HR instructions PCNT or
WCAP) or HR output compares (using the HR instructions ECMP, MCMP or PWCNT).
All five HR instructions (PCNT, WCAP, ECMP, MCMP and PWCNT) have a dedicated hr_lr bit (high
resolution/low resolution; program field bit 8) allowing operation either in HR mode or in standard
resolution mode by ignoring the HR field. By default, the hr_lr bit value is 0 which implies HR operation
mode. However, setting this bit to one allows the use of several HR instructions on a single HR pin. Only
one instruction is allowed to operate in HR mode (bit cleared to 0), but the other instructions can be used
in standard resolution mode (bit set to 1).
23.2.5.4 HR Block Diagram
Each time an HR instruction is executed on a given pin, the HR structure for that pin is programmed
(which HR function to perform and on which edges it should take an action) with the information given by
the instruction. The HR structure for each pin decodes the pin select field of the instruction and programs
its HR structure if it matches.
NOTE: For each N2HET pin, only one instruction specifying a high resolution operation (hr_lr=HIGH)
is allowed to execute per loop resolution period. This includes any instructions where
(hr_lr=HIGH) but (en_pin_action=OFF).
The first high resolution instruction that executes and specifies a particular pin locks out
subsequent high resolution instructions from operating on the same pin until the end fo the
current loop resolution period.
Figure 23-11. HR I/O Architecture
948
High-End Timer (N2HET) Module SPNU562–May 2014
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