Datasheet

114
RM57L843
SPNS215C –FEBRUARY 2014–REVISED JUNE 2016 www.ti.com
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System Information and Electrical Specifications Copyright © 2014–2016, Texas Instruments Incorporated
Table 6-38. EMIF Synchronous Memory Switching Characteristics (continued)
NO. PARAMETER MIN MAX UNIT
10 t
oh(CLKH-DIV)
Output hold time, EMIF_CLK rising to EMIF_DATA[15:0] invalid 1 ns
11 t
d(CLKH-RASV)
Delay time, EMIF_CLK rising to EMIF_nRAS valid 7 ns
12 t
oh(CLKH-RASIV)
Output hold time, EMIF_CLK rising to EMIF_nRAS invalid 1 ns
13 t
d(CLKH-CASV)
Delay time, EMIF_CLK rising to EMIF_nCAS valid 7 ns
14 t
oh(CLKH-CASIV)
Output hold time, EMIF_CLK rising to EMIF_nCAS invalid 1 ns
15 t
d(CLKH-WEV)
Delay time, EMIF_CLK rising to EMIF_nWE valid 7 ns
16 t
oh(CLKH-WEIV)
Output hold time, EMIF_CLK rising to EMIF_nWE invalid 1 ns
17 t
dis(CLKH-DHZ)
Delay time, EMIF_CLK rising to EMIF_DATA[15:0] tri-stated 7 ns
18 t
ena(CLKH-DLZ)
Output hold time, EMIF_CLK rising to EMIF_DATA[15:0] driving 1 ns