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22.2.1.10 How to Stop a Conversion
A group’s conversion can be stopped by clearing the group’s channel select register.
22.2.1.11 Example Sequence for Basic Configuration of ADC Module
The following sequence is necessary to configure the ADC to convert channels 0, 2, 4, and 8 in single-
conversion mode using Group1:
1. Write 0 to the Reset Control Register (ADRSTCR) to release the module from the reset state
2. Write 1 to the ADC_EN bit of the Operating Mode Control Register (ADOPMODECR) to enable the
ADC state machine
3. Configure the ADCLK frequency by programming the desired divider into the Clock Control Register
(ADCLOCKCR)
4. Configure the acquisition time for the group that is to be used. For example, configure the Group1
Sampling Time Control Register (ADG1SAMP) to set the acquisition time for Group1.
5. Select the channels that need to be converted in Group1 by writing to the Group1 Channel Select
Register (ADG1SEL). In this example, a value of 0x115 needs to be written to ADG1SEL in order to
select channels 0, 2, 4, and 8 for conversion in Group1.
• The ADC sequencer will start the Group1 conversions as soon as the write to the ADG1SEL
register is completed.
6. Wait for the GP1_END bit to be set in the Group1 Conversion Status Register (ADG1SR). This bit gets
set when all the channels selected for conversion in Group1 are converted and the results are stored in
the Group1 memory.
7. Read the conversion results by reading from the Group1 FIFO access location (ADG1BUFFER) or by
reading directly from the Group1 results’ memory.
835
SPNU562–May 2014 Analog To Digital Converter (ADC) Module
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