Datasheet

EMIF
EMIF_nCS[0]
EMIF_nCAS
EMIF_nRAS
EMIF_nWE
EMIF_CLK
EMIF_nCKE
EMIF_nBA[1]
EMIF_nBA[0]
EMIF_nA[11:0]
EMIF_nDQM[0]
EMIF_nDQM[1]
EMIF_D[15:0]
EMIF_nCS[2]
EMIF_nCS[3]
EMIF_nOE
EMIF_WAIT
GPIO (1 pin)
EMIF_A
[18:13]
nRESET
Reset
SDRAM
1M x 16
x 4 bank
nCE
nCAS
nRAS
nWE
CLK
CKE
BA[1]
BA[0]
A[11:0]
LDQM
UDQM
DQ[15:0]
FLASH
512k x 16
A[0]
A[12:1]
DQ[15:0]
nCE
nWE
nOE
nRESET
A[18:13]
RY/BY
nBYTE0
nBYTE1
FLASH
512k x 16
A[0]
A[12:1]
DQ[15:0]
nCE
nWE
nOE
nRESET
A[18:13]
RY/BY
nBYTE0
nBYTE1
www.ti.com Example Configuration
Figure 21-27. Example Configuration Interface
817
SPNU562–May 2014 External Memory Interface (EMIF)
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