Datasheet

102
RM57L843
SPNS215C –FEBRUARY 2014–REVISED JUNE 2016 www.ti.com
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System Information and Electrical Specifications Copyright © 2014–2016, Texas Instruments Incorporated
(1) This programming time includes overhead of state machine, but does not include data transfer time. The programming time assumes
programming 288 bits at a time at the maximum specified operating frequency.
6.10.5 Flash Program and Erase Timings
6.10.5.1 Flash Program and Erase Timings for Program Flash
Table 6-31. Timing Requirements for Program Flash
MIN NOM MAX UNIT
t
prog(288bits)
Wide Word (288-bits) programming time 40 300 µs
t
prog(Total)
4.0MB programming time
(1)
–40°C to 105°C 21.3 s
0°C to 60°C, for first
25 cycles
5.3 10.6 s
t
erase
Sector/Bank erase time
–40°C to 105°C 0.3 4 s
0°C to 60°C, for first
25 cycles
100 ms
t
wec
Write/erase cycles with 15-year Data Retention
requirement
–40°C to 105°C 1000 cycles
(1) This programming time includes overhead of state machine, but does not include data transfer time. The programming time assumes
programming 72 bits at a time at the maximum specified operating frequency.
6.10.5.2 Flash Program and Erase Timings for Data Flash
Table 6-32. Timing Requirements for Data Flash
MIN NOM MAX UNIT
t
prog(72bits)
Wide Word (72-bits) programming time 47 300 µs
t
prog(Total)
EEPROM Emulation (bank 7) 128KB
programming time
(1)
–40°C to 105°C 2.6 s
0°C to 60°C, for first
25 cycles
775 1320 ms
EEPROM Emulation (bank 7) Sector/Bank erase time t
erase(bank7)
–40°C to 105°C 0.2 8 s
0°C to 60°C, for first
25 cycles
14 100 ms
t
wec
Write/erase cycles with 15-year Data Retention
requirement
–40°C to 105°C 100000 cycles