Datasheet

www.ti.com
STC Control Registers
10.8.13 Segment Interval Preload Register (STCSEGPLR)
This register is described in Figure 10-26. This register is used to specify the segment for which the first
interval will be run. The address of the first interval of the selected segment is loaded to the STC ROM
address counter before the test is started.
Figure 10-26. Segment Interval Preload Register (STCSEGPLR) [offset = 48h]
31 16
Reserved
R-0
15 2 1 0
Reserved SEGID_PLOAD
R-0 RWP-0
LEGEND: R/W = Read/Write; R = Read only; WP = Write in privilege mode only; -n = value after nPORST (power on reset) or System reset
Table 10-21. Segment Interval Preload Register (STCSEGPLR) Field Descriptions
Bit Field Value Description
31-2 Reserved 0 Reads return zeros, writes have no effect
1-0 SEGID_PLOAD Specifies the segment for the first interval to be run
0 Preload the address of the 1st interval for Segment 0
1 Preload the address of the 1st interval for Segment 1
All other values Reserved
447
SPNU563May 2014 Self-Test Controller (STC) Module
Submit Documentation Feedback
Copyright © 2014, Texas Instruments Incorporated