Datasheet

59
TMS570LC4357
www.ti.com SPNS195C –FEBRUARY 2014–REVISED JUNE 2016
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SpecificationsCopyright © 2014–2016, Texas Instruments Incorporated
(1) The typical value is the average current for the nominal process corner and junction temperature of 25ºC.
(2) The maximum I
CC,
value can be derated
• linearly with voltage
• by 1.8 mA/MHz for lower GCLK frequency when f
GCLK
= 2 * f
HCLK
= 4 * f
VCLK
• for lower junction temperature by the equation below where T
JK
is the junction temperature in Kelvin and the result is in milliamperes.
405 - 0.2 e
0.018 T
JK
(3) The maximum I
CC,
value can be derated
• linearly with voltage
• by 3.2 mA/MHz for lower GCLK frequency
• for lower junction temperature by the equation below where T
JK
is the junction temperature in Kelvin and the result is in milliamperes.
405 - 0.2 e
0.018 T
JK
(4) LBIST and PBIST currents are for a short duration, typically less than 10 ms. They are usually ignored for thermal calculations for the
device and the voltage regulator.
5.7 Power Consumption Summary
Over Recommended Operating Conditions
PARAMETER TEST CONDITIONS MIN TYP
(1)
MAX UNIT
I
CC
V
CC
digital supply and PLL current
(operating mode)
f
GCLK
= 300 MHz,
f
HCLK
= 150 MHz,
f
VCLK
= 75 MHz,
f
VCLK2
= 75 MHz,
f
VCLK3
= 150 MHz
510 990
(2)
mA
V
CC
digital supply and PLL current
(LBIST mode, or PBIST mode)
LBIST clock rate = 75 MHz
880 1375
(3)(4)
mA
PBIST ROM clock frequency = 75 MHz
I
CCIO
V
CCIO
digital supply current (operating mode) No DC load, V
CCmax
15 mA
I
CCAD
V
CCAD
supply current (operating mode)
Single ADC operational, V
CCADmax
15 mA
Single ADC power down, V
CCADmax
5 µA
Both ADCs operational, V
CCADmax
30 mA
I
CCREF
HI
AD
REFHI
supply current (operating mode)
Single ADC operational, AD
REFHImax
5 mA
Both ADCs operational, AD
REFHImax
10 mA
I
CCP
V
CCP
pump supply current
Read operation of two banks in parallel,
V
CCPmax
70 mA
Read from two banks and program or
erase another bank, V
CCPmax
93 mA