Datasheet

Introduction
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Table 2-1. Definition of Terms (continued)
Acronym/Term Full Form Description
GIO General-purpose Input/Output The GIO module allows up to 16 terminals to be used as general-purpose Input
or Output. Each of these are also capable of generating an interrupt to the
CPU.
DCANx Controller Area Network The DCAN supports the CAN 2.0B protocol standard and uses a serial, multi-
controller master communication protocol that efficiently supports distributed real-time
control with robust communication rates of up to 1 megabit per second (Mbps).
The DCAN is ideal for applications operating in noisy and harsh environments
(for example, automotive and industrial fields) that require reliable serial
communication or multiplexed wiring.
LINx Local Interconnect Network The LIN module supports the Local Interconnect standard revision 2.1 and can
controller be used as a UART in full-duplex mode using the standard Non-Return-to-Zero
(NRZ) format.
SCIx Serial Communication The SCI module supports the standard UART in full-duplex mode using the
Interface standard Non-Return-to-Zero (NRZ) format.
I2Cx Inter-Integrated Circuit The I2C module is a multi-master communication module providing an interface
controller between the device and an I2C-compatible device via the I2C serial bus. The
I2C supports both 100 Kbps and 400 Kbps speeds.
FlexRay FlexRay communication The FlexRay uses a dual channel serial, fixed time base multi-master
controller communication protocol with communication rates of 10 megabits per second
(Mbps) per channel.
MibSPIx Multi-Buffered Serial The MibSPIx modules also support the standard SPI communication protocol.
Peripheral Interface The transfers are all grouped into transfer chunks called “transfer groups”.
These transfer groups are made up of one ore more buffers in the MibSPIx
RAM. The RAM is used to hold the control information and data to be
transmitted, as well as the status information and data that is received. There
are five MibSPI modules in this device.
ePWM Enhanced Pulse Width The enhanced pulse width modulator (ePWM) peripheral is a key element in
Modulator controlling many of the power electronic systems found in both commercial and
industrial equipments. These systems include digital motor control, switch mode
power supply control, uninterruptible power supplies (UPS), and other forms of
power conversion. The ePWM peripheral performs a digital to analog (DAC)
function, where the duty cycle is equivalent to a DAC analog value; it is
sometimes referred to as a Power DAC.
eCAP Enhanced Capture Module The enhanced Capture (eCAP) module is essential in systems where accurate
timing of external events is important.
eQEP Enhanced Quadrature Encoder The enhanced quadrature encoder pulse (eQEP) module is used for direct
Pulse Module interface with a linear or rotary incremental encoder to get position, direction,
and speed information from a rotating machine for use in a high-performance
motion and position-control system.
eFuse Electronically Programmable Electrically programmable fuses (eFuses) are used to configure the device after
Fuse controller deassertion of PORRST. The eFuse values are read and loaded into internal
registers as part of the power-on-reset sequence. The eFuse values are
protected with single bit error correction, double bit error detection (SECDED)
codes. These fuses are programmed during the initial factory test of the device.
The eFuse controller is designed so that the state of the eFuses cannot be
changed once the device is packaged.
NMPUx Enhanced Memory Protection There are three standalone NMPUs on this device protecting memory
Unit transactions initiated by DMA, EMAC and other masters onto the resources on
the device. In this device, all transactions initiated by non-CPU masters will go
through two levels of MPU protection. The two levels can be a combination of
two NMPU in series or one standalone NMPU and one build-in MPU as part of
the master. One NMPU is dedicated to the DMA port connecting to the CPU
Interconnect Subsystem as the second level protection while the built-in MPU
inside the DMA acts as the first level protection. HTUx and FTU all have their
built-in MPU acting as the first level protection. All accesses initiated by the
masters on the Peripheral Interconnect Subsystem side will funnel through
another NMPU sitting in between the path connecting the Peripheral
Interconnect Subsystem to the CPU Interconnect Subsystem. This will act as
the second level protection for HTUx, FTU and EMAC. EMAC does not have
the built-in MPU and hence a standalone NMPU is instantiated between the
EMAC and the interconnect.
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Architecture SPNU563May 2014
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