Datasheet

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35-25. Time-Base Phase Register (TBPHS) Field Descriptions........................................................... 2007
35-26. Time-Base Period Register (TBPRD) Field Descriptions .......................................................... 2007
35-27. Time-Base Counter Register (TBCTR) Field Descriptions......................................................... 2007
35-28. Counter-Compare Control Register (CMPCTL) Field Descriptions .............................................. 2008
35-29. Counter-Compare A Register (CMPA) Field Descriptions ......................................................... 2009
35-30. Counter-Compare B Register (CMPB) Field Descriptions ......................................................... 2010
35-31. Action-Qualifier Output A Control Register (AQCTLA) Field Descriptions ...................................... 2011
35-32. Action-Qualifier Software Force Register (AQSFRC) Field Descriptions ........................................ 2012
35-33. Action-Qualifier Output B Control Register (AQCTLB) Field Descriptions ...................................... 2013
35-34. Action-qualifier Continuous Software Force Register (AQCSFRC) Field Descriptions ........................ 2014
35-35. Dead-Band Generator Control Register (DBCTL) Field Descriptions ............................................ 2015
35-36. Dead-Band Generator Falling Edge Delay Register (DBFED) Field Descriptions.............................. 2017
35-37. Dead-Band Generator Rising Edge Delay Register (DBRED) Field Descriptions.............................. 2017
35-38. Trip Zone Digital Compare Event Select Register (TZDCSEL) Field Descriptions ............................. 2018
35-39. Trip-Zone Submodule Select Register (TZSEL) Field Descriptions ............................................. 2019
35-40. Trip-Zone Enable Interrupt Register (TZEINT) Field Descriptions................................................ 2021
35-41. Trip-Zone Control Register (TZCTL) Field Descriptions ........................................................... 2022
35-42. Trip-Zone Clear Register (TZCLR) Field Descriptions ............................................................. 2023
35-43. Trip-Zone Flag Register (TZFLG) Field Descriptions............................................................... 2024
35-44. Trip-Zone Force Register (TZFRC) Field Descriptions............................................................. 2025
35-45. Event-Trigger Selection Register (ETSEL) Field Descriptions ................................................... 2026
35-46. Event-Trigger Flag Register (ETFLG) Field Descriptions .......................................................... 2027
35-47. Event-Trigger Prescale Register (ETPS) Field Descriptions ..................................................... 2028
35-48. Event-Trigger Force Register (ETFRC) Field Descriptions ....................................................... 2030
35-49. Event-Trigger Clear Register (ETCLR) Field Descriptions......................................................... 2031
35-50. PWM-Chopper Control Register (PCCTL) Bit Descriptions ....................................................... 2032
35-51. Digital Compare A Control Register (DCACTL) Field Descriptions............................................... 2034
35-52. Digital Compare Trip Select (DCTRIPSEL) Field Descriptions.................................................... 2035
35-53. Digital Compare Filter Control Register (DCFCTL) Field Descriptions........................................... 2036
35-54. Digital Compare B Control Register (DCBCTL) Field Descriptions............................................... 2037
35-55. Digital Compare Filter Offset Register (DCFOFFSET) Field Descriptions....................................... 2038
35-56. Digital Compare Capture Control Register (DCCAPCTL) Field Descriptions ................................... 2038
35-57. Digital Compare Filter Window Register (DCFWINDOW) Field Descriptions ................................... 2039
35-58. Digital Compare Filter Offset Counter Register (DCFOFFSETCNT) Field Descriptions....................... 2039
35-59. Digital Compare Counter Capture Register (DCCAP) Field Descriptions ....................................... 2040
35-60. Digital Compare Filter Window Counter Register (DCFWINDOWCNT) Field Descriptions ................... 2040
36-1. Encoding of Destination Bits in Trace Mode Packet Format ...................................................... 2044
36-2. Encoding of Status Bits in Trace Mode Packet Format ............................................................ 2044
36-3. Encoding of Write Size in Packet Format ............................................................................ 2044
36-4. Number of Clock Cycles per Packet .................................................................................. 2045
36-5. Pins Used for Data Communication .................................................................................. 2045
36-6. DMM Registers .......................................................................................................... 2048
36-7. DMM Global Control Register (DMMGLBCTRL) Field Descriptions.............................................. 2049
36-8. DMM Interrupt Set Register (DMMINTSET) Field Descriptions................................................... 2051
36-9. DMM Interrupt Clear Register (DMMINTCLR) Field Descriptions ................................................ 2055
36-10. DMM Interrupt Level Register (DMMINTLVL) Field Descriptions................................................. 2060
36-11. DMM Interrupt Flag Register (DMMINTFLG) Field Descriptions.................................................. 2062
36-12. DMM Interrupt Offset 1 Register (DMMOFF1) Field Descriptions ................................................ 2066
36-13. DMM Interrupt Offset 2 Register (DMMOFF1) Field Descriptions ................................................ 2067
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SPNU563–May 2014 List of Tables
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