Datasheet
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22-82. ADC Group2 Current Count Register (ADG2CURRCOUNT) Field Descriptions ................................ 937
22-83. ADC Group2 Maximum Count Register (ADG2MAXCOUNT) Field Descriptions................................ 937
23-1. N2HET RAM Base Addresses .......................................................................................... 948
23-2. N2HET RAM Bank Structure............................................................................................ 949
23-3. Pin Safe State Upon Parity Error Detection ........................................................................... 950
23-4. N2HET Parity Bit Mapping............................................................................................... 950
23-5. Prescale Factor Register Encoding .................................................................................... 952
23-6. Interpretation of the 7-Bit HR Data Field............................................................................... 953
23-7. Edge Detection Input Timing for Loop Resolution Instructions ..................................................... 962
23-8. Edge Detection Input Timing for High Resolution Instructions...................................................... 962
23-9. Input Buffer, Output Buffer and Pull Control Behavior ............................................................... 967
23-10. N2HET Pin Disable Feature............................................................................................. 968
23-11. Pulse Length Examples for Suppression Filter ....................................................................... 969
23-12. Interrupt Sources and Corresponding Offset Values in Registers HETOFFx..................................... 970
23-13. N2HET Registers ......................................................................................................... 977
23-14. Global Configuration Register (HETGCR) Field Descriptions ...................................................... 978
23-15. Prescale Factor Register (HETPFR) Field Descriptions............................................................. 979
23-16. N2HET Current Address (HETADDR) Field Descriptions ........................................................... 980
23-17. Offset Index Priority Level 1 Register (HETOFF1) Field Descriptions............................................. 980
23-18. Interrupt Offset Encoding Format....................................................................................... 981
23-19. Offset Index Priority Level 2 Register (HETOFF2) Field Descriptions............................................. 981
23-20. Interrupt Enable Set Register (HETINTENAS) Field Descriptions ................................................. 982
23-21. NHET Interrupt Enable Clear (HETINTENAC) Field Descriptions ................................................. 982
23-22. Exception Control Register 1 (HETEXC1) Field Descriptions ...................................................... 983
23-23. Exception Control Register 2 (HETEXC2) Field Descriptions ...................................................... 984
23-24. Interrupt Priority Register (HETPRY) Field Descriptions ............................................................ 985
23-25. Interrupt Flag Register (HETFLG) Field Descriptions................................................................ 985
23-26. AND Share Control Register (HETAND) Field Descriptions ........................................................ 986
23-27. HR Share Control Register (HETHRSH) Field Descriptions ........................................................ 987
23-28. XOR Share Control Register (HETXOR) Field Descriptions ........................................................ 988
23-29. Request Enable Set Register (HETREQENS) Field Descriptions.................................................. 989
23-30. Request Enable Clear Register (HETREQENC) Field Descriptions ............................................... 989
23-31. Request Destination Select Register (HETREQDS) Field Descriptions........................................... 990
23-32. N2HET Direction Register (HETDIR) Field Descriptions ............................................................ 991
23-33. N2HET Data Input Register (HETDIN) Field Descriptions .......................................................... 992
23-34. N2HET Data Output Register (HETDOUT) Field Descriptions ..................................................... 992
23-35. N2HET Data Set Register (HETDSET) Field Descriptions.......................................................... 993
23-36. N2HET Data Clear Register (HETDCLR) Field Descriptions ....................................................... 993
23-37. N2HET Open Drain Register (HETPDR) Field Descriptions ........................................................ 994
23-38. N2HET Pull Disable Register (HETPULDIS) Field Descriptions ................................................... 994
23-39. N2HET Pull Select Register (HETPSL) Field Descriptions.......................................................... 995
23-40. Parity Control Register (HETPCR) Field Descriptions ............................................................... 996
23-41. Parity Address Register (HETPAR) Field Descriptions .............................................................. 997
23-42. Parity Pin Register (HETPPR) Field Descriptions .................................................................... 998
23-43. Known State on Parity Error............................................................................................. 998
23-44. Suppression Filter Preload Register (HETSFPRLD) Field Descriptions........................................... 999
23-45. Suppression Filter Enable Register (HETSFENA) Field Descriptions ............................................. 999
23-46. Loop Back Pair Select Register (HETLBPSEL) Field Descriptions............................................... 1000
23-47. Loop Back Pair Direction Register (HETLBPDIR) Field Descriptions ............................................ 1001
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SPNU563–May 2014 List of Tables
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