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33-5. Continuous/One-shot Block............................................................................................ 1865
33-6. Counter and Synchronization Block .................................................................................. 1866
33-7. Interrupts in eCAP Module............................................................................................. 1867
33-8. PWM Waveform Details of APWM Mode Operation................................................................ 1868
33-9. Capture Sequence for Absolute Time-stamp and Rising Edge Detect........................................... 1870
33-10. Capture Sequence for Absolute Time-stamp With Rising and Falling Edge Detect............................ 1872
33-11. Capture Sequence for Delta Mode Time-stamp and Rising Edge Detect ....................................... 1874
33-12. Capture Sequence for Delta Mode Time-stamp With Rising and Falling Edge Detect ........................ 1876
33-13. PWM Waveform Details of APWM Mode Operation................................................................ 1878
33-14. Time-Stamp Counter Register (TSCTR) [offset = 00h]............................................................. 1879
33-15. Counter Phase Control Register (CTRPHS) [offset = 04h] ........................................................ 1879
33-16. Capture-1 Register (CAP1) [offset = 08h]............................................................................ 1880
33-17. Capture-2 Register (CAP2) [offset = 0Ch] ........................................................................... 1880
33-18. Capture-3 Register (CAP3) [offset = 10h]............................................................................ 1881
33-19. Capture-4 Register (CAP4) [offset = 14h]............................................................................ 1881
33-20. ECAP Control Register 2 (ECCTL2) [offset = 28h ] ................................................................ 1882
33-21. ECAP Control Register 1 (ECCTL1) [offset = 2Ah ] ................................................................ 1884
33-22. ECAP Interrupt Flag Register (ECFLG) [offset = 2Ch] ............................................................. 1886
33-23. ECAP Interrupt Enable Register (ECEINT) [offset = 2Eh] ......................................................... 1887
33-24. ECAP Interrupt Forcing Register (ECFRC) [offset = 30h] ......................................................... 1888
33-25. ECAP Interrupt Clear Register (ECCLR) [offset = 32h] ............................................................ 1889
34-1. Optical Encoder Disk ................................................................................................... 1891
34-2. QEP Encoder Output Signal for Forward/Reverse Movement .................................................... 1891
34-3. Index Pulse Example ................................................................................................... 1892
34-4. Functional Block Diagram of the eQEP Peripheral ................................................................. 1894
34-5. Functional Block Diagram of Decoder Unit .......................................................................... 1896
34-6. Quadrature Decoder State Machine .................................................................................. 1897
34-7. Quadrature-clock and Direction Decoding ........................................................................... 1898
34-8. Position Counter Reset by Index Pulse for 1000 Line Encoder (QPOSMAX = 3999 or F9Fh) ............... 1900
34-9. Position Counter Underflow/Overflow (QPOSMAX = 4) ........................................................... 1901
34-10. Software Index Marker for 1000-line Encoder (QEPCTL[IEL] = 1) ............................................... 1903
34-11. Strobe Event Latch (QEPCTL[SEL] = 1) ............................................................................. 1903
34-12. eQEP Position-compare Unit .......................................................................................... 1904
34-13. eQEP Position-compare Event Generation Points.................................................................. 1905
34-14. eQEP Position-compare Sync Output Pulse Stretcher............................................................. 1905
34-15. eQEP Edge Capture Unit .............................................................................................. 1907
34-16. Unit Position Event for Low Speed Measurement (QCAPCTL[UPPS] = 0010)................................. 1907
34-17. eQEP Edge Capture Unit - Timing Details........................................................................... 1908
34-18. eQEP Watchdog Timer ................................................................................................. 1909
34-19. eQEP Unit Time Base .................................................................................................. 1909
34-20. EQEP Interrupt Generation ............................................................................................ 1910
34-21. eQEP Position Counter Register (QPOSCNT) ...................................................................... 1912
34-22. eQEP Position Counter Initialization Register (QPOSINIT)........................................................ 1912
34-23. eQEP Maximum Position Count Register (QPOSMAX)............................................................ 1912
34-24. eQEP Position-Compare Register (QPOSCMP).................................................................... 1913
34-25. eQEP Index Position Latch Register (QPOSILAT) [offset = 10h]................................................. 1913
34-26. eQEP Strobe Position Latch Register (QPOSSLAT) [offset = 14h] .............................................. 1913
34-27. eQEP Position Counter Latch Register (QPOSLAT) [offset = 18h]............................................... 1914
34-28. eQEP Unit Timer Register (QUTMR) [offset = 1Ch]................................................................ 1914
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SPNU563–May 2014 List of Figures
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