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27-17. CAN Core in Loop Back Mode ........................................................................................ 1392
27-18. CAN Core in External Loop Back Mode.............................................................................. 1393
27-19. CAN Core in Loop Back Combined with Silent Mode .............................................................. 1394
27-20. CAN Control Register (DCAN CTL) [offset = 00h] .................................................................. 1398
27-21. Error and Status Register (DCAN ES) [offset = 04h]............................................................... 1401
27-22. Error Counter Register (DCAN ERRC) [offset = 08h] .............................................................. 1403
27-23. Bit Timing Register (DCAN BTR) [offset = 0Ch] .................................................................... 1404
27-24. Interrupt Register (DCAN INT) [offset = 10h]........................................................................ 1405
27-25. Test Register (DCAN TEST) [offset = 14h] .......................................................................... 1406
27-26. Parity Error Code Register (DCAN PERR) [offset = 1Ch] ......................................................... 1407
27-27. ECC Diagnostic Register (DCAN ECCDIAG) [offset = 24h]....................................................... 1407
27-28. ECC Diagnostic Status Register (DCAN ECCDIAG STAT) [offset = 28h]....................................... 1408
27-29. ECC Control and Status Register (DCAN ECC CS) [offset = 2Ch]............................................... 1409
27-30. ECC Single Bit Error Code Register (DCAN ECC SERR) [offset = 30h] ........................................ 1410
27-31. Auto-Bus-On Time Register (DCAN ABOTR) [offset = 80h]....................................................... 1411
27-32. Transmission Request X Register (DCAN TXRQ X) [offset = 84h]............................................... 1411
27-33. Transmission Request 12 Register (DCAN TXRQ12) [offset = 88h] ............................................. 1412
27-34. Transmission Request 34 Register (DCAN TXRQ34) [offset = 8Ch]............................................. 1412
27-35. Transmission Request 56 Register (DCAN TXRQ56) [offset = 90h] ............................................. 1412
27-36. Transmission Request 78 Register (DCAN TXRQ78) [offset = 94h] ............................................. 1412
27-37. New Data X Register (DCAN NWDAT X) [offset = 98h] ........................................................... 1413
27-38. New Data 12 Register (DCAN NWDAT12) [offset = 9Ch] ......................................................... 1414
27-39. New Data 34 Register (DCAN NWDAT34) [offset = A0h] ......................................................... 1414
27-40. New Data 56 Register (DCAN NWDAT56) [offset = A4h] ......................................................... 1414
27-41. New Data 78 Register (DCAN NWDAT78) [offset = A8h] ......................................................... 1414
27-42. Interrupt Pending X Register (DCAN INTPND X) [offset = ACh] ................................................. 1415
27-43. Interrupt Pending 12 Register (DCAN INTPND12) [offset = B0h] ................................................ 1416
27-44. Interrupt Pending 34 Register (DCAN INTPND34) [offset = B4h] ................................................ 1416
27-45. Interrupt Pending 56 Register (DCAN INTPND56) [offset = B8h] ................................................ 1416
27-46. Interrupt Pending 78 Register (DCAN INTPND78) [offset = BCh]................................................ 1416
27-47. Message Valid X Register (DCAN MSGVAL X) [offset = C0h].................................................... 1417
27-48. Message Valid 12 Register (DCAN MSGVAL12) [offset = C4h] .................................................. 1418
27-49. Message Valid 34 Register (DCAN MSGVAL34) [offset = C8h] .................................................. 1418
27-50. Message Valid 56 Register (DCAN MSGVAL56) [offset = CCh].................................................. 1418
27-51. Message Valid 78 Register (DCAN MSGVAL78) [offset = D0h] .................................................. 1418
27-52. Interrupt Multiplexer 12 Register (DCAN INTMUX12) [offset = D8h]............................................. 1419
27-53. Interrupt Multiplexer 34 Register (DCAN INTMUX34) [offset = DCh] ............................................ 1419
27-54. Interrupt Multiplexer 56 Register (DCAN INTMUX56) [offset = E0h]............................................. 1419
27-55. Interrupt Multiplexer 78 Register (DCAN INTMUX78) [offset = E4h]............................................. 1419
27-56. IF1 Command Registers (DCAN IF1CMD) [offset = 100h] ........................................................ 1420
27-57. IF2 Command Registers (DCAN IF2CMD) [offset = 120h] ........................................................ 1420
27-58. IF1 Mask Register (DCAN IF1MSK) [offset = 104h]................................................................ 1423
27-59. IF2 Mask Register (DCAN IF2MSK) [offset = 124h]................................................................ 1423
27-60. IF1 Arbitration Register (DCAN IF1ARB) [offset = 108h] .......................................................... 1424
27-61. IF2 Arbitration Register (DCAN IF2ARB) [offset = 128h] .......................................................... 1424
27-62. IF1 Message Control Register (DCAN IF1MCTL) [offset = 10Ch]................................................ 1426
27-63. IF2 Message Control Register (DCAN IF2MCTL) [offset = 12Ch]................................................ 1426
27-64. IF1 Data A Register (DCAN IF1DATA) [offset = 110h]............................................................. 1428
27-65. IF1 Data B Register (DCAN IF1DATB) [offset = 114h]............................................................. 1428
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SPNU563–May 2014 List of Figures
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