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23.4.11 Interrupt Flag Register (HETFLG) .......................................................................... 985
23.4.12 AND Share Control Register (HETAND) .................................................................. 986
23.4.13 HR Share Control Register (HETHRSH)................................................................... 987
23.4.14 XOR Share Control Register (HETXOR)................................................................... 988
23.4.15 Request Enable Set Register (HETREQENS) ............................................................ 989
23.4.16 Request Enable Clear Register (HETREQENC).......................................................... 989
23.4.17 Request Destination Select Register (HETREQDS)...................................................... 990
23.4.18 NHET Direction Register (HETDIR) ........................................................................ 991
23.4.19 N2HET Data Input Register (HETDIN) ..................................................................... 992
23.4.20 N2HET Data Output Register (HETDOUT) ................................................................ 992
23.4.21 NHET Data Set Register (HETDSET) ...................................................................... 993
23.4.22 N2HET Data Clear Register (HETDCLR).................................................................. 993
23.4.23 N2HET Open Drain Register (HETPDR)................................................................... 994
23.4.24 N2HET Pull Disable Register (HETPULDIS) .............................................................. 994
23.4.25 N2HET Pull Select Register (HETPSL) .................................................................... 995
23.4.26 Parity Control Register (HETPCR).......................................................................... 996
23.4.27 Parity Address Register (HETPAR)......................................................................... 997
23.4.28 Parity Pin Register (HETPPR)............................................................................... 998
23.4.29 Suppression Filter Preload Register (HETSFPRLD) ..................................................... 999
23.4.30 Suppression Filter Enable Register (HETSFENA)........................................................ 999
23.4.31 Loop Back Pair Select Register (HETLBPSEL) ......................................................... 1000
23.4.32 Loop Back Pair Direction Register (HETLBPDIR)....................................................... 1001
23.4.33 N2HET Pin Disable Register (HETPINDIS) .............................................................. 1002
23.5 Instruction Set ........................................................................................................... 1003
23.5.1 Instruction Summary ......................................................................................... 1003
23.5.2 Abbreviations, Encoding Formats and Bits ............................................................... 1005
23.5.3 Instruction Description ....................................................................................... 1008
24 High-End Timer Transfer Unit (HTU) Module....................................................................... 1073
24.1 Overview.................................................................................................................. 1074
24.1.1 Features ........................................................................................................ 1074
24.2 Module Operation ....................................................................................................... 1075
24.2.1 Data Transfers between Main RAM and NHET RAM .................................................... 1077
24.2.2 Arbitration of HTU Elements and Frames.................................................................. 1082
24.2.3 Conditions for Frame Transfer Interruption ................................................................ 1082
24.2.4 HTU Overload and Request Lost Detection ............................................................... 1083
24.2.5 Memory Protection ............................................................................................ 1085
24.2.6 Control Packet RAM Parity Checking ...................................................................... 1086
24.3 Use Cases................................................................................................................ 1088
24.3.1 Example: Single Element Transfer with One Trigger Request.......................................... 1088
24.3.2 Example: Multiple Element Transfer with One Trigger Request ........................................ 1088
24.3.3 Example: 64-Bit-Transfer of Control Field and Data Fields.............................................. 1090
24.4 HTU Control Registers.................................................................................................. 1091
24.4.1 Global Control Register (HTU GC).......................................................................... 1092
24.4.2 Control Packet Enable Register (HTU CPENA)........................................................... 1093
24.4.3 Control Packet (CP) Busy Register 0 (HTU BUSY0)..................................................... 1094
24.4.4 Control Packet (CP) Busy Register 1 (HTU BUSY1)..................................................... 1095
24.4.5 Control Packet (CP) Busy Register 2 (HTU BUSY2)..................................................... 1095
24.4.6 Control Packet (CP) Busy Register 3 (HTU BUSY3)..................................................... 1096
24.4.7 Active Control Packet and Error Register (HTU ACPE).................................................. 1096
24.4.8 Request Lost and Bus Error Control Register (HTU RLBECTRL)...................................... 1098
24.4.9 Buffer Full Interrupt Enable Set Register (HTU BFINTS) ................................................ 1099
24.4.10 Buffer Full Interrupt Enable Clear Register (HTU BFINTC) ............................................ 1099
24.4.11 Interrupt Mapping Register (HTU INTMAP) .............................................................. 1100
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SPNU563–May 2014 Contents
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