Datasheet

ECAPx

PSout

div 2

PSout

div 4

PSout

div 6

PSout

div 8

PSout

div 10

ECCTL1[EVTPS]

prescaler [5 bits]

(counter)

By−pass

Event prescaler

ECAPx pin

(from GPIO)

PSout

Basic Operation

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Figure 33-3. Event Prescale Control

A When a prescale value of 1 is chosen (ECCTL1[13:9] = 0,0,0,0,0 ), the input capture signal by-passes the prescale

logic completely.

Figure 33-4. Prescale Function Waveforms

33.2.2.2 Edge Polarity Select and Qualifier

• Four independent edge polarity (rising edge/falling edge) selection MUXes are used, one for each

capture event.

• Each edge (up to 4) is event qualified by the Modulo4 sequencer.

• The edge event is gated to its respective CAPx register by the Mod4 counter. The CAPx register is

loaded on the falling edge.

1864

Enhanced Capture (eCAP) Module SPNU563–May 2014

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