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EMAC Control Module Registers
32.3.13 EMAC Control Module Transmit Interrupts Per Millisecond Registers (C0TXIMAX)
The EMAC control module transmit interrupts per millisecond register (C0TXIMAX) is shown in
Figure 32-24 and described in Table 32-23
Figure 32-24. EMAC Control Module Transmit Interrupts Per Millisecond Register (C0TXIMAX)
(offset = 74h)
31 16
Reserved
R-0
15 6 5 0
Reserved TXIMAX
R-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 32-23. EMAC Control Module Transmit Interrupts Per Millisecond Register (C0TXIMAX)
Bit Field Value Description
31-6 Reserved 0 Reserved
5-0 TXIMAX 2-3Fh TXIMAX is the desired number of C0TXPULSE interrupts generated per millisecond when
C0TXPACEEN is enabled in INTCONTROL.
The pacing mechanism can be described by the following pseudo-code:
while(1) {
interrupt_count = 0;
/* Count interrupts over a 1ms window */
for(i = 0; i < INTCONTROL[INTPRESCALE]*250; i++) {
interrupt_count += NEW_INTERRUPT_EVENTS();
if(i < INTCONTROL[INTPRESCALE]*pace_counter)
BLOCK_EMAC_INTERRUPTS();
else
ALLOW_EMAC_INTERRUPTS();
}
ALLOW_EMAC_INTERRUPTS();
if(interrupt_count > 2*TXIMAX)
pace_counter = 255;
else if(interrupt_count > 1.5*TXIMAX)
pace_counter = previous_pace_counter*2 + 1;
else if(interrupt_count > 1.0*TXIMAX)
pace_counter = previous_pace_counter + 1;
else if(interrupt_count > 0.5*TXIMAX)
pace_counter = previous_pace_counter - 1;
else if(interrupt_count != 0)
pace_counter = previous_pace_counter/2;
else
pace_counter = 0;
previous_pace_counter = pace_counter;
}
1799
SPNU563–May 2014 EMAC/MDIO Module
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