Datasheet

DCAN Control Registers

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27.17.11 ECC Single Bit Error Code Register (DCAN ECC SERR)

If an ECC single bit error is detected, the SEFLG flag will be set in the ECC Control and Status Register.

In addition to the SEFLG flag, the ECC Single Bit Error Code Register will indicate the memory area

where the single bit error has been detected (message object number only).

If more than one word with an ECC single bit error was detected, the highest word number with an ECC

single bit error error will be displayed.

After an ECC single bit error has been detected, the register will hold the last error code until power is

removed.

Figure 27-30. ECC Single Bit Error Code Register (DCAN ECC SERR) [offset = 30h]

31 16

Reserved

R-0

15 8 7 0

Reserved Message Number

R-0 R-U

LEGEND: R = Read only; -n = value after reset; U = Undefined

Table 27-17. ECC Single Bit Error Code Register (DCAN ECC SERR) Field Descriptions

Bit Field Value Description

31-8 Reserved 0 These bits are always read as 0. Writes have no effect.

7-0 Message Number 1h-80h Message object number where ECC single bit error has been detected

1410

Controller Area Network (DCAN) Module SPNU563–May 2014

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