Datasheet
FlexRay Module Registers
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26.3.2.9.6 Output Buffer Command Mask Register (OBCM)
Configures how the Output Buffer is updated from the message buffer in the Message RAM selected by
bits OBRS of the output buffer command request register. Mask bits RDSS and RHSS are copied to the
register internal storage when a Message RAM transfer is requested by OBCR.REQ. When OBF host and
OBF shadow are swapped, also mask bits RDSH and RHSH are swapped with bits RDSS and RHSS to
keep them attached to the respective output buffer transfer.
Figure 26-191 and Table 26-170 illustrate this register.
Figure 26-191. Output Buffer Command Mask Register (OBCM) [offset_CC = 700h]
31 18 17 16
Reserved RDSH RHSH
R-0 R-0 R-0
15 2 1 0
Reserved RDSS RHSS
R-0 R/W-0 R/W-0
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
Table 26-170. Output Buffer Command Mask Register (MBS) Field Descriptions
Bit Field Value Description
31-18 Reserved 0 Read returns 0. Writes have no effect.
17 RDSH Read data section host.
0 Data section is not read
1 Data section selected for transfer from message RAM to output buffer
16 RHSH Read header section host.
0 Header section is not read
1 Header section selected for transfer from message RAM to output buffer
15-2 Reserved 0 Read returns 0. Writes have no effect.
1 RDSS Read Data Section shadow.
0 Data section is not read
1 Data section selected for transfer from message RAM to output buffer
0 RHSS Read header section shadow
0 Header section is not read
1 Header section selected for transfer from message RAM to output buffer
NOTE: After the transfer of the header section from the message RAM to OBF shadow has
completed, the message buffer status Changed flag MBS of the selected message buffer in
the message buffer Changed 1,2,3,4 registers is cleared. After the transfer of the data
section from the message RAM to OBF shadow has completed, the New Data flag ND of the
selected message buffer in the New Data 1,2,3,4 registers is cleared.
1356
FlexRay Module SPNU563–May 2014
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