Datasheet

FlexRay Module Registers

www.ti.com

26.3.2.4.10 Even Sync ID Registers (ESID[1-15])

Registers ESID1 to ESID15 hold the frame IDs of the sync frames received in even communication

cycles, assorted in ascending order, with register ESID1 holding the lowest received sync frame ID. If the

node transmits a sync frame in an even communication cycle by itself, register ESID1 holds the respective

sync frame ID as configured in message buffer 0. The value is updated during the NIT of each even

communication cycle. This register is reset when the Communication Controller leaves CONFIG state or

enters STARTUP state.

Figure 26-155 and Table 26-140 illustrate this register.

Figure 26-155. Even Sync ID Registers (ESIDn) [offset_CC = 130h-168h]

31 16

Reserved

R-0

15 14 13 10 9 0

RXEB RXEA Reserved EID

R-0 R-0 R-0 R-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 26-140. Even Sync ID Registers (ESIDn) Field Descriptions

Bit Field Value Description

31-16 Reserved 0 Read returns 0. Writes have no effect.

15 RXEB Received even sync ID on channel B. A sync frame corresponding to the stored even sync ID was

received on channel B.

0 Sync frame not received on channel B

1 Sync frame received on channel B

14 RXEA Received even sync ID on channel A. A sync frame corresponding to the stored even sync ID was

received on channel A.

0 Sync frame not received on channel A

1 Sync frame received on channel A

13-10 Reserved 0 Read returns 0. Writes have no effect.

9-0 EID Even Sync ID. Sync frame ID even communication cycle.

1326

FlexRay Module SPNU563–May 2014

Submit Documentation Feedback