Datasheet

FlexRay Module Registers

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Figure 26-100. Transfer to Communication Controller Interrupt Enable Set 2 (TCCIES2)

[offset_TU = 128h]

31 16

TCCIES2(31-16)

R/S-0

15 0

TCCIES2(15-0)

R/S-0

LEGEND: R/W = Read/Write; R = Read only; C = Clear; S = Set; -n = value after reset

Table 26-86. Transfer to Communication Controller Interrupt Enable Set 2 (TCCIES2)

Field Descriptions

Bit Field Value Description

31-0 TCCIES2(31-0) Transfer to Communication Controller Interrupt Enable Set 2. The register bits 0 to 31 correspond

to message buffers 32 to 63. Each bit of the register enables a potential interrupt, which occurs if

the corresponding TCCO2 bit is set:

0 No interrupt.

1 Interrupt is generated.

Figure 26-101. Transfer to Communication Controller Interrupt Enable Reset 2 (TCCIER2)

[offset_TU = 12Ch]

31 16

TCCIER2(31-16)

R/C-0

15 0

TCCIER2(15-0)

R/C-0

LEGEND: R/W = Read/Write; R = Read only; C = Clear; S = Set; -n = value after reset

Table 26-87. Transfer to Communication Controller Interrupt Enable Reset 2 (TCCIER2)

Field Descriptions

Bit Field Description

31-0 TCCIER2(31-0) Transfer to Communication Controller Interrupt Enable Reset 2. The TCCIER2 register shows the

identical values to TCCIES2 if read.

1262

FlexRay Module SPNU563–May 2014

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