Datasheet

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26.3.1.24 Transfer to Communication Controller Interrupt Enable Set/Reset (TCCIES[1-4]/TCCIER[1-4])
The Transfer to Communication Controller Interrupt Enable registers enables the interrupt generation on
interrupt line TU_Int0, after a transfer to the communication controller occurred (flagged in TCCO). Four
32-bit Registers reflect all 128 MBs.
The bits are set by writing 1 to TCCIESx and reset by writing 1 to TCCIERx. Writing a 0 has no effect.
Reading from both addresses will result in the same value.
Figure 26-98. Transfer to Communication Controller Interrupt Enable Set 1 (TCCIES1)
[offset_TU = 120h]
31 16
TCCIES1(31-16)
R/S-0
15 0
TCCIES1(15-0)
R/S-0
LEGEND: R/W = Read/Write; R = Read only; C = Clear; S = Set; -n = value after reset
Table 26-84. Transfer to Communication Controller Interrupt Enable Set 1 (TCCIES1)
Field Descriptions
Bit Field Value Description
31-0 TCCIES1(31-0) Transfer to Communication Controller Interrupt Enable Set 1. The register bits 0 to 31 correspond
to message buffers 0 to 31. Each bit of the register enables a potential interrupt, which occurs if the
corresponding TCCO1 bit is set:
0 No interrupt.
1 Interrupt is generated.
Figure 26-99. Transfer to Communication Controller Interrupt Enable Reset 1 (TCCIER1)
[offset_TU = 124h]
31 16
TCCIER1(31-16)
R/C-0
15 0
TCCIER1(15-0)
R/C-0
LEGEND: R/W = Read/Write; R = Read only; C = Clear; S = Set; -n = value after reset
Table 26-85. Transfer to Communication Controller Interrupt Enable Reset 1 (TCCIER1)
Field Descriptions
Bit Field Description
31-0 TCCIER1(31-0) Transfer to Communication Controller Interrupt Enable Reset 1. The TCCIER1 register shows the
identical values to TCCIES1 if read.
1261
SPNU563–May 2014 FlexRay Module
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