Datasheet

FlexRay Module Registers

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Figure 26-88. Clear on Event to System Memory Set 4 (CESMS4) [offset_TU = F8h]

31 16

CESMS4(31-16)

R/S-0

15 0

CESMS4(15-0)

R/S-0

LEGEND: R/W = Read/Write; R = Read only; C = Clear; S = Set; -n = value after reset

Table 26-74. Clear on Event to System Memory Set 4 (CESMS4) Field Descriptions

Bit Field Value Description

31-0 CESMS4(31-0) Clear on Event to System Memory Set 4. The register bits 0 to 31 correspond to message buffers

96 to 127. Each bit of the register enables an automatic clear of the corresponding ETESM4 bit

after a receive or transmit event:

0 No clear.

1 Activate clear.

Figure 26-89. Clear on Event to System Memory Reset 4 (CESMR4) [offset_TU = FCh]

31 16

CESMR4(31-16)

R/C-0

15 0

CESMR4(15-0)

R/C-0

LEGEND: R/W = Read/Write; R = Read only; C = Clear; S = Set; -n = value after reset

Table 26-75. Clear on Event to System Memory Reset 4 (CESMR4) Field Descriptions

Bit Field Description

31-0 CESMR4(31-0) Clear on Event to System Memory Reset 4. The CESMR4 register shows the identical values to

CESMS4 if read.

1256

FlexRay Module SPNU563–May 2014

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