Datasheet

www.ti.com FlexRay Module Registers
Figure 26-86. Clear on Event to System Memory Set 3 (CESMS3) [offset_TU = F0h]
31 16
CESMS3(31-16)
R/S-0
15 0
CESMS3(15-0)
R/S-0
LEGEND: R/W = Read/Write; R = Read only; C = Clear; S = Set; -n = value after reset
Table 26-72. Clear on Event to System Memory Set 3 (CESMS3) Field Descriptions
Bit Field Value Description
31-0 CESMS3(31-0) Clear on Event to System Memory Set 3. The register bits 0 to 31 correspond to message buffers
64 to 95. Each bit of the register enables an automatic clear of the corresponding ETESM3 bit after
a receive or transmit event:
0 No clear.
1 Activate clear.
Figure 26-87. Clear on Event to System Memory Reset 3 (CESMR3) [offset_TU = F4h]
31 16
CESMR3(31-16)
R/C-0
15 0
CESMR3(15-0)
R/C-0
LEGEND: R/W = Read/Write; R = Read only; C = Clear; S = Set; -n = value after reset
Table 26-73. Clear on Event to System Memory Reset 3 (CESMR3) Field Descriptions
Bit Field Description
31-0 CESMR3(31-0) Clear on Event to System Memory Reset 3. The CESMR3 register shows the identical values to
CESMS3 if read.
1255
SPNU563–May 2014 FlexRay Module
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