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FlexRay Module Registers

Figure 26-50. Transfer to Communication Controller Occurred 3 (TCCO3) [offset_TU = 58h]

31 16

TCCO3(31-16)

R/W1C-0

15 0

TCCO3(15-0)

R/W1C-0

LEGEND: R/W = Read/Write; R = Read only; C = Clear; -n = value after reset

Table 26-36. (Transfer to Communication Controller Occurred 3 (TCCO3) Field Descriptions

Bit Field Value Description

31-0 TCCO3(31-0) Transfer to Communication Controller Occurred Register 3.

The register bits 0 to 31 correspond to message buffers 64 to 65. Each bit of the register reflects a

finished message buffer transfer from the system memory.

0 No transfer occurred.

1 Transfer occurred.

Figure 26-51. Transfer to Communication Controller Occurred 4 (TCCO4) [offset_TU = 5Ch]

31 16

TCCO4(31-16)

R/W1C-0

15 0

TCCO4(15-0)

R/W1C-0

LEGEND: R/W = Read/Write; R = Read only; C = Clear; -n = value after reset

Table 26-37. (Transfer to Communication Controller Occurred 4 (TCCO4) Field Descriptions

Bit Field Value Description

31-0 TCCO4(31-0) Transfer to Communication Controller Occurred Register 4.

The register bits 0 to 31 correspond to message buffers 96 to 127. Each bit of the register reflects a

finished message buffer transfer from the system memory.

0 No transfer occurred.

1 Transfer occurred.

1233

SPNU563–May 2014 FlexRay Module

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