Datasheet

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26.3.1.12 Transfer to System Memory Occurred (TSMO[1-4])
The Transfer to System Memory Occurred register reflects the message buffer transfer status for a
transfer transaction to the system memory. Four 32-bit registers reflect all possible 128 message buffers.
NOTE: Writing 1 will clear a bit. Writing 0 will leave a bit unchanged.
Figure 26-44. Transfer to System Memory Occurred 1 (TSMO1) [offset_TU = 40h]
31 16
TSMO1(31-16)
R/W1C-0
15 0
TSMO1(15-0)
R/W1C-0
LEGEND: R/W = Read/Write; R = Read only; C = Clear; -n = value after reset
Table 26-30. Transfer to System Memory Occurred 1 (TSMO1) Field Descriptions
Bit Field Value Description
31-0 TSMO1(31-0) Transfer to System Memory Occurred Register 1.
The register bits 0 to 31 correspond to message buffers 0 to 31. Each bit of the register reflects a
finished message buffer transfer to the system memory.
0 No transfer occurred.
1 Transfer occurred.
Figure 26-45. Transfer to System Memory Occurred 2 (TSMO2) [offset_TU = 44h]
31 16
TSMO2(31-16)
R/W1C-0
15 0
TSMO2(15-0)
R/W1C-0
LEGEND: R/W = Read/Write; R = Read only; C = Clear; -n = value after reset
Table 26-31. Transfer to System Memory Occurred 2 (TSMO2) Field Descriptions
Bit Field Value Description
31-0 TSMO2(31-0) Transfer to System Memory Occurred Register 2.
The register bits 0 to 31 correspond to message buffers 32 to 63. Each bit of the register reflects a
finished message buffer transfer to the system memory.
0 No transfer occurred.
1 Transfer occurred.
1230
FlexRay Module SPNU563–May 2014
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