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ADC Registers

Table 22-26. ADC Event Group DMA Control Register (ADEVDMACR) Field Descriptions (continued)

Bit Field Value Description

0 EV_DMA_EN Event Group DMA Transfer Enable.

Any operation mode read:

0 ADC module does not generate a DMA request when it writes the conversion result to the

Event Group memory.

1 ADC module generates a DMA transfer when the ADC has written to the Event Group memory.

The EV_BLK_XFER bit must be cleared to 0 for this DMA request to be generated.

893

SPNU563–May 2014 Analog To Digital Converter (ADC) Module

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