Datasheet

109

TMS570LC4357

www.ti.com

SPNS195C –FEBRUARY 2014–REVISED JUNE 2016

Submit Documentation Feedback

Product Folder Links: TMS570LC4357

6.14 External Memory Interface (EMIF)

6.14.1 Features

The EMIF includes many features to enhance the ease and flexibility of connecting to external

asynchronous memories or SDRAM devices. The EMIF features includes support for:

• 3 addressable chip select for asynchronous memories of up to 16MB each

• 1 addressable chip select space for SDRAMs up to 128MB

• 8 or 16-bit data bus width

• Programmable cycle timings such as setup, strobe, and hold times as well as turnaround time

• Select strobe mode

• Extended Wait mode

• Data bus parking

NOTE

The EMIF is inherently BE8, or byte invariant big endian. This device is BE32, or word

invariant big endian. There is no difference when interfacing to RAM or using an 8-bit wide

data bus. However, there is an impact when reading from external ROMs or interfacing to

hardware registers with a 16-bit wide data bus. The EMIF can be made BE32 by connecting

EMIF_DATA[7:0] to the ROM or ASIC DATA[15:8] and EMIF_DATA[15:8] to the ROM or

ASIC DATA[7:0].

Alternatively, the code stored in the ROM can be linked as -be8 instead of -be32.

NOTE

For a 32-bit access on the 16-bit EMIF interface, the lower 16-bits (the EMIF_BA[1] will be

low) will be put out first followed by the upper 16-bits (EMIF_BA[1] will be high).