Datasheet

TMS570LS0432
TMS570LS0332
www.ti.com SPNS186A –OCTOBER 2012–REVISED SEPTEMBER 2013
Table 6-1. Device ID Bit Allocation Register Field Descriptions
Bit Field Value Description
31 CP15 Indicates the presence of coprocessor 15
1 CP15 present
30-17 UNIQUE ID 100100
Silicon version (revision) bits.
This bitfield holds a unique number for a dedicated device configuration (die).
16-13 TECH Process technology on which the device is manufactured.
0101 F021
12 I/O VOLTAGE I/O voltage of the device.
0 I/O are 3.3v
11 PERIPHERAL Peripheral Parity
PARITY
1 Parity on peripheral memories
10-9 FLASH ECC Flash ECC
10 Program memory with ECC
8 RAM ECC Indicates if RAM memory ECC is present.
1 ECC implemented
7-3 REVISION 0 Revision of the Device.
2-0 FAMILY ID 101 The platform family ID is always 0b101
6.2.2 Die Identification Registers
The four die ID registers at addresses 0xFFFFE1F0, 0xFFFFE1F4, 0xFFFFE1F8 and FFFFE1FC form a
128-bit dieid with the information as shown in Table Table 6-2.
Table 6-2. Die-ID Registers
Item # of Bits Bit Location
X Coord. on Wafer 12 0xFFFFE1F0[11:0]
Y Coord. on Wafer 12 0xFFFFE1F0[23:12]
Wafer # 8 0xFFFFE1F0[31:24]
Lot # 24 0xFFFFE1F4[23:0]
Reserved 72 0xFFFFE1F4[31:24], 0xFFFFE1F8[31:0],
0xFFFFE1FC[31:0]
6.3 Community Resources
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see TI's Terms of Use.
Hercules™ ARM® Cortex™ Safety Microcontroller Section of the TI E2E Support Community. TI's
Engineer-to-Engineer (E2E) Community. Created to foster collaboration among engineers.
At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help solve
problems with fellow engineers.
6.4 Module Certifications
The following communications modules have received certification of adherence to a standard.
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