Datasheet

TMS570LS0432
TMS570LS0332
SPNS186A –OCTOBER 2012–REVISED SEPTEMBER 2013 www.ti.com
Figure 6-2. Device ID Bit Allocation Register
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
CP-15 UNIQUE ID TECH
R-1 R-00000000100100 R-0
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
TECH I/O PERIPH FLASH ECC RAM VERSION 1 0 1
VOLT PARITY ECC
AGE
R-101 R-0 R-1 R-10 R-1 R-00001 R-1 R-0 R-1
LEGEND: R/W = Read/Write; R = Read only; -n = value after reset
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