Datasheet

Prefix: TM
TMS = Fully Qualified
TMP = Prototype
TMX = Samples
Core Technology:
570 = Cortex R4
Architecture:
LS = Dual CPUs in Lockstep
(not included in orderable part #)
Flash Memory Size:
04 = 384kB
RAM MemorySize:
3 = 32kB
Peripheral Set:
Die Revision:
Blank = Initial Die
Package Type:
PZ = 100 Pin Package
Temperature Range:
Q = -40...+125 C
o
Quality Designator:
Q1 = Automotive
Shipping Options:
R = Tape and Reel
Full Part # TMS 570 LS 04 3 2 A PZ Q Q1 R
Orderable Part # TMS 570 04 3 2 A PZ Q Q1 R
TMS = Fully Qualified
TMP = Prototype
TMX = Samples
Core Technology:
570 = Cortex R4
Architecture:
LS = Dual CPUs in Lockstep
(not included in orderable part #)
Flash Memory Size:
04 = 384kB
03 = 256kB
RAM MemorySize:
3 = 32kB
Peripheral Set:
Die Revision:
Blank = Initial Die
A = Die Revision A
Package Type:
PZ = 100 Pin Package
Temperature Range:
Q = -40...+125 C
o
Quality Designator:
Q1 = Automotive
Shipping Options:
R = Tape and Reel
Prefix: TM
TMS570LS0432
TMS570LS0332
www.ti.com SPNS186A –OCTOBER 2012–REVISED SEPTEMBER 2013
6.2 Device Identification
The figure below illustrates the numbering and symbol nomenclature for the TMS570LS0432/0332 .
Figure 6-1. Device Numbering Conventions
6.2.1 Device Identification Code Register
The device identification code register identifies several aspects of the device including the silicon version.
The details of the device identification code register are shown in Table 6-1. The device identification code
register value for this device is:
• Rev 0 = 0x8048AD05
• Rev A = 0x8048AD0D
Copyright © 2012–2013, Texas Instruments Incorporated Device and Documentation Support 95
Submit Documentation Feedback
Product Folder Links: TMS570LS0432 TMS570LS0332