Datasheet

TMS570LS0432
TMS570LS0332
www.ti.com SPNS186A –OCTOBER 2012–REVISED SEPTEMBER 2013
Table 4-26. ESM Channel Assignments (continued)
ERROR SOURCES GROUP CHANNELS
Reserved Group1 18
MibADC - parity Group1 19
Reserved Group1 20
DCAN1 - parity Group1 21
Reserved Group1 22
DCAN2 - parity Group1 23
Reserved Group1 24
Reserved Group1 25
RAM even bank (B0TCM) - correctable error Group1 26
CPU - selftest Group1 27
RAM odd bank (B1TCM) - correctable error Group1 28
Reserved Group1 29
DCC - error Group1 30
CCM-R4 - selftest Group1 31
Reserved Group1 32
Reserved Group1 33
Reserved Group1 34
FMC - correctable error (EEPROM bank access) Group1 35
FMC - uncorrectable error (EEPROM bank access) Group1 36
IOMM - Mux configuration error Group1 37
Reserved Group1 38
Reserved Group1 39
eFuse farm – this error signal is generated whenever any bit in the eFuse farm Group1 40
error status register is set. The application can choose to generate and interrupt
whenever this bit is set in order to service any eFuse farm error condition.
eFuse farm - self test error. It is not necessary to generate a separate interrupt Group1 41
when this bit gets set.
Reserved Group1 42
Reserved Group1 43
Reserved Group1 44
Reserved Group1 45
Reserved Group1 46
Reserved Group1 47
Reserved Group1 48
Reserved Group1 49
Reserved Group1 50
Reserved Group1 51
Reserved Group1 52
Reserved Group1 53
Reserved Group1 54
Reserved Group1 55
Reserved Group1 56
Reserved Group1 57
Reserved Group1 58
Reserved Group1 59
Reserved Group1 60
Reserved Group1 61
Reserved Group1 62
Copyright © 2012–2013, Texas Instruments Incorporated System Information and Electrical Specifications 59
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