Datasheet

TMS570LS0432
TMS570LS0332
www.ti.com SPNS186A –OCTOBER 2012–REVISED SEPTEMBER 2013
4.8.2 Memory Map Table
Please refer to Figure 1-1 for a block diagram showing the device interconnects.
Table 4-17. Device Memory Map
ADDRESS RANGE RESPONSE FOR ACCESS TO
FRAME CHIP FRAME ACTUA
MODULE NAME UNIMPLEMENTED LOCATIONS IN
SELECT SIZE L SIZE
START END
FRAME
Memories tightly coupled to the ARM Cortex-R4 CPU
TCM Flash CS0 0x0000_0000 0x00FF_FFFF 16MB 384KB
TCM RAM + RAM
CSRAM0 0x0800_0000 0x0BFF_3FFF 64MB 32KB
ECC Abort
Flash mirror
Mirrored Flash 0x2000_0000 0x20FF_FFFF 16MB 384KB
frame
Flash Module Bus2 Interface
Customer OTP,
0xF000_0000 0xF000_07FF 2KB
TCM Flash Banks
64KB
Customer OTP,
0xF000_E000 0xF000_E3FF 1KB
EEPROM Bank
Customer
OTP–ECC, TCM 0xF004_0000 0xF004_00FF 256B
Flash Banks
8KB
Customer
OTP–ECC, 0xF004_1C00 0xF004_1C7F 128B
EEPROM Bank
TI OTP, TCM
0xF008_0000 0xF008_07FF 2KB
Flash Banks
Abort
64KB
TI OTP, EEPROM
0xF008_E000 0xF008_E3FF 1KB
Bank
TI OTP–ECC,
0xF00C_0000 0xF00C_00FF 256B
TCM Flash Banks
8KB
TI OTP–ECC,
0xF00C_1C00 0xF00C_1C7F 128B
EEPROM Bank
EEPROM
0xF010_0000 0xF010_07FF 256KB 2KB
Bank–ECC
EEPROM Bank 0xF020_0000 0xF020_3FFF 2MB 16KB
Flash Data Space
0xF040_0000 0xF040_DFFF 1MB 48KB
ECC
Cyclic Redundancy Checker (CRC) Module Registers
CRC CRC frame 0xFE00_0000 0xFEFF_FFFF 16MB 512B Accesses above 0x200 generate abort.
Peripheral Memories
MIBSPI1 RAM PCS[7] 0xFF0E_0000 0xFF0F_FFFF 128KB 2KB Abort for accesses above 2KB
Wrap around for accesses to
unimplemented address offsets lower
DCAN2 RAM PCS[14] 0xFF1C_0000 0xFF1D_FFFF 128KB 2KB
than 0x7FF. Abort generated for
accesses beyond offset 0x800.
Wrap around for accesses to
unimplemented address offsets lower
DCAN1 RAM PCS[15] 0xFF1E_0000 0xFF1F_FFFF 128KB 2KB
than 0x7FF. Abort generated for
accesses beyond offset 0x800.
Wrap around for accesses to
MIBADC RAM 8KB unimplemented address offsets lower
than 0x1FFF.
Look-up table for ADC wrapper. Starts
PCS[31] 0xFF3E_0000 0xFF3F_FFFF 128KB
at offset 0x2000 ans ends at 0x217F.
MIBADC Look-Up 384
Wrap around for accesses between
Table bytes
offsets 0x180 and 0x3FFF. Aborts
generated for accesses beyond 0x4000
Copyright © 2012–2013, Texas Instruments Incorporated System Information and Electrical Specifications 43
Submit Documentation Feedback
Product Folder Links: TMS570LS0432 TMS570LS0332