Datasheet

TMS570LS0432
TMS570LS0332
SPNS186A –OCTOBER 2012–REVISED SEPTEMBER 2013 www.ti.com
3.5 Power Consumption Over Recommended Operating Conditions
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
f
HCLK
= 80MHz
V
CC
digital supply current (operating mode) 135
(1)
mA
f
VCLK
= 80MHz,
Flash in pipelined
mode, V
CCmax
I
CC
LBIST clock rate =
V
CC
Digital supply current (LBIST mode) 145
(2)(3)
mA
45MHz
PBIST ROM clock 135
(2)(3)
VCC Digital supply current (PBIST mode) mA
frequency = 80MHz
I
CCREFHI
AD
REFHI
supply current (operating mode) AD
REFHImax
3 mA
I
CCAD
V
CCAD
supply current (operating mode) V
CCADmax
45
(4)
I
CCIO
V
CCIO
Digital supply current (operating mode. No DC load, V
CCmax
mA
I
CCP
V
CCP
pump supply current Read mode
read from one bank 65
(4)
I
CCP,
and program or
3.3V supply current mA
I
CCIO,
I
CCAD
erase another,
V
CCPmax
(1) The maximum I
CC,
value can be derated
• linearly with voltage
• by 0.76 mA/MHz for lower operating frequency when f
HCLK
= f
VCLK
• for lower junction temperature by the equation below where T
JK
is the junction temperature in Kelvin and the result is in milliamperes.
60 - 0.001 e
0.026 T
JK
(2) The maximum I
CC,
value can be derated
• linearly with voltage
• for lower junction temperature by the equation below where T
JK
is the junction temperature in Kelvin and the result is in milliamperes.
60 - 0.001 e
0.026 T
JK
(3) LBIST and PBIST currents are for a short duration, typically less than 10ms. They are usually ignored for thermal calculations for the
device and the voltage regulator
(4) Maximum current requirement of the three combined supplies
20 Device Operating Conditions Copyright © 2012–2013, Texas Instruments Incorporated
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