Datasheet

TMS570LS0432
TMS570LS0332
SPNS186A –OCTOBER 2012–REVISED SEPTEMBER 2013 www.ti.com
2.3 Output Multiplexing and Control
Output multiplexing will be utilized in the device. The multiplexing is utilized to allow development of
additional package/feature combinations as well as to maintain pinout compatibility with the marketing
device family.
In all cases indicated as multiplexed, the output buffers are multiplexed.
Table 2-17. Output Mux Options
100PZ Pin Default Function Control 1 Option2 Control 2 Option 3 Control 3
1 GIOA[0] PINMMR0[8] SPI3nCS[3] PINMMR0[9] - -
2 GIOA[1] PINMMR1[0] SPI3nCS[2] PINMMR1[1] - -
5 GIOA[2] PINMMR1[8] SPI3nCS[1] PINMMR1[9] - -
8 GIOA[3] PINMMR1[16] SPI2nCS[3] PINMMR1[17] - -
9 GIOA[4] PINMMR1[24] SPI2nCS[2] PINMMR1[25] - -
10 GIOA[5] PINMMR2[0] EXTCLKIN PINMMR2[1] - -
12 GIOA[6] PINMMR2[8] SPI2nCS[1] PINMMR2[9] N2HET[31] PINMMR2[10]
18 GIOA[7] PINMMR2[16] N2HET[29] PINMMR2[17] - -
93 MIBSPI1nCS[1] PINMMR6[8] EQEPS PINMMR6[9] N2HET[17] PINMMR6[10]
27 MIBSPI1nCS[2] PINMMR3[0] N2HET[20] PINMMR3[1] N2HET[19] PINMMR3[2]
39 MIBSPI1nCS[3] PINMMR4[8] N2HET[26] PINMMR4[9] - -
68 MIBSPI1nENA PINMMR5[8] N2HET[23] PINMMR5[9] N2HET[30] PINMMR5[10]
36 SPI3CLK PINMMR3[16] EQEPA PINMMR3[17] - -
38 SPI3nCS[0] PINMMR4[0] EQEPI PINMMR4[1] - -
37 SPI3nENA PINMMR3[24] EQEPB PINMMR3[25] - -
58 ADEVT PINMMR4[16] N2HET[28] PINMMR4[17] - -
2.3.1 Notes on Output Multiplexing
Table 2-17 shows the output signal multiplexing and control signals for selecting the desired functionality
for each pin.
• The pins default to the signal defined by the "Default Function" column in Table 2-17
• The "CTRL x" columns indicate the multiplexing control register and the bit that must be set in order to
select the corresponding functionality to be output on any particular pin.
For example, consider the multiplexing on pin 18, shown below.
Table 2-18. Muxing Example
100PZ Pin Default Function Control 1 Option2 Control 2 Option 3 Control 3
18 GIOA[7] PINMMR2[16] N2HET[29] PINMMR2[17] - -
• When GIOA[7] is configured as an output pin in the GIO module control register, then the programmed
output level appears on pin 18 by default. The PINMMR2[16] bit is set by default to indicate that the
GIOA[7] signal is selected to be output.
• If the application needs to output the N2HET[29] signal on pin 18, it must clear PINMMR2[16] and set
PINMMR2[17].
• Note that the pin is connected as input to both the GIO and N2HET modules. That is, there is no input
multiplexing on this pin.
2.3.2 General Rules for Multiplexing Control Registers
• The PINMMR control registers can only be written in privileged mode. A write in a non–privileged mode
will generate an error response.
• If the application writes all 0’s to any PINMMR control register, then the default functions are selected
for the affected pins.
16 Device Package and Terminal Functions Copyright © 2012–2013, Texas Instruments Incorporated
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