Datasheet

TMS570LS0432
TMS570LS0332
SPNS186A –OCTOBER 2012–REVISED SEPTEMBER 2013 www.ti.com
2.2.6 Standard Serial Peripheral Interface (SPI2)
Table 2-6. Standard Serial Peripheral Interface (SPI2)
Terminal Signal Default Pull Type Description
Type Pull State
Signal Name 100
PZ
SPI2CLK 71 I/O Pull Up Programmable, SPI2 Serial Clock, or GPIO
20uA
SPI2nCS[0] 23 SPI2 Chip Select, or GPIO
GIOA[6]/SPI2nCS[1]/N2HET[31] 12
GIOA[4]/SPI2nCS[2] 9
GIOA[3]/SPI2nCS[3] 8
SPI2SIMO 70 SPI2 Slave-In-Master-Out, or GPIO
SPI2SOMI 69 SPI2 Slave-Out-Master-In, or GPIO
The drive strengths for the SPI2CLK, SPI2SIMO and SPI2SOMI signals are selected individually by configuring the respective SRS bits of
the SPIPC9 register fo SPI2.
SRS = 0 for 8mA drive (fast). This is the default mode as the SRS bits in the SPIPC9 register default to 0.
SRS = 1 for 2mA drive (slow)
SPI3CLK/EQEPA 36 I/O Pull Up Programmable, SPI3 Serial Clock, or GPIO
20uA
SPI3nCS[0]/EQEPI 38 SPI3 Chip Select, or GPIO
GIOA[2]/SPI3nCS[1] 5
GIOA[1]/SPI3nCS[2] 2
GIOA[0]/SPI3nCS[3] 1
SPI3nENA/EQEPB 37 SPI3 Enable, or GPIO
SPI3SIMO 35 SPI3 Slave-In-Master-Out, or GPIO
SPI3SOMI 34 SPI3 Slave-Out-Master-In, or GPIO
2.2.7 Local Interconnect Network Controller (LIN)
Table 2-7. Local Interconnect Network Controller (LIN)
Terminal Signal Default Pull Type Description
Type Pull State
Signal Name 100
PZ
LINRX 94 I/O Pull Up Programmable, LIN Receive, or GPIO
20uA
LINTX 95 LIN Transmit, or GPIO
2.2.8 Multi-Buffered Analog-to-Digital Converter (MibADC)
Table 2-8. Multi-Buffered Analog-to-Digital Converter (MibADC)
Terminal Signal Default Pull Type Description
Type Pull State
Signal Name 100
PZ
ADEVT/N2HET[28] 58 I/O Pull Up Programmable, ADC Event Trigger or GPIO
20uA
12 Device Package and Terminal Functions Copyright © 2012–2013, Texas Instruments Incorporated
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