Datasheet

98
TMS320F28379S , TMS320F28377S
TMS320F28376S, TMS320F28375S, TMS320F28374S
SPRS881C –AUGUST 2014–REVISED MAY 2016 www.ti.com
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Specifications Copyright © 2014–2016, Texas Instruments Incorporated
5.8.1.1 ADC Electrical Data and Timing
Table 5-43 shows the ADC operating conditions for 16-bit differential mode. Table 5-44 shows the ADC
characteristics for 16-bit differential mode. Table 5-45 shows the ADC operating conditions for 12-bit
single-ended mode. Table 5-46 shows the ADC characteristics for 12-bit single-ended mode. Table 5-47
shows the ADCEXTSOC timing requirements.
(1) V
REFCM
= (V
REFHI
+ V
REFLO
)/2
Table 5-43. ADC Operating Conditions (16-Bit Differential Mode)
over recommended operating conditions (unless otherwise noted)
MIN TYP MAX UNIT
ADCCLK (derived from PERx.SYSCLK) 5 50 MHz
Sample window duration (set by ACQPS and PERx.SYSCLK)
320 ns
1 ADCCLK
V
REFHI
2.4 2.5 or 3.0 V
DDA
V
V
REFLO
V
SSA
0 V
SSA
V
V
REFHI
– V
REFLO
2.4 V
DDA
V
ADC input conversion range V
REFLO
V
REFHI
V
ADC input signal common mode voltage
(1)
V
REFCM
– 50 V
REFCM
V
REFCM
+ 50 mV
NOTE
The ADC inputs should be kept below V
DDA
+ 0.3 V during operation. If an ADC input
exceeds this level, the V
REF
internal to the device may be disturbed, which can impact results
for other ADC or DAC inputs using the same V
REF
.