Datasheet

TMS320F28379S

TMS320F28377S

TMS320F28376S, TMS320F28375S, TMS320F28374S

SPRS881C –AUGUST 2014–REVISED MAY 2016

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Product Folder Links: TMS320F28379S TMS320F28377S TMS320F28376S TMS320F28375S TMS320F28374S

5.8.1 Analog-to-Digital Converter (ADC)

The ADCs on this device are successive approximation (SAR) style ADCs with selectable resolution of

either 16 bits or 12 bits. There are multiple ADC modules which allow simultaneous sampling. The ADC

wrapper is start-of-conversion (SOC) based [see the SOC Principle of Operation section of the

TMS320F2837xS Delfino Microcontrollers Technical Reference Manual.

Each ADC has the following features:

• Selectable resolution of 16 bits or 12 bits

• Ratiometric external reference set by V

REFHI

and V

REFLO

• Differential signal conversions (16-bit mode only)

• Single-ended signal conversions (12-bit mode only)

• Input multiplexer with up to 16 channels (single-ended) or 8 channels (differential)

• 16 configurable SOCs

• 16 individually addressable result registers

• Multiple trigger sources

– Software immediate start

– All ePWMs

– GPIO XINT2

– CPU timers

– ADCINT1 or 2

• Four flexible PIE interrupts

• Burst mode

• Four post-processing blocks, each with:

– Saturating offset calibration

– Error from setpoint calculation

– High, low, and zero-crossing compare, with interrupt and ePWM trip capability

– Trigger-to-sample delay capture